Development of Next Generation Spectrometer for Radio Telescope
| Project/Area Number |
15H05304
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| Research Category |
Grant-in-Aid for Young Scientists (A)
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| Allocation Type | Single-year Grants |
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| Research Field |
Computer system
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| Research Institution | Tokyo Institute of Technology (2016-2018)
Ehime University (2015) |
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Principal Investigator |
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| Project Period (FY) |
2015-04-01 – 2019-03-31
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| Project Status |
Completed (Fiscal Year 2018)
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| Budget Amount *help |
¥24,700,000 (Direct Cost: ¥19,000,000、Indirect Cost: ¥5,700,000)
Fiscal Year 2018: ¥2,990,000 (Direct Cost: ¥2,300,000、Indirect Cost: ¥690,000)
Fiscal Year 2017: ¥2,730,000 (Direct Cost: ¥2,100,000、Indirect Cost: ¥630,000)
Fiscal Year 2016: ¥2,080,000 (Direct Cost: ¥1,600,000、Indirect Cost: ¥480,000)
Fiscal Year 2015: ¥16,900,000 (Direct Cost: ¥13,000,000、Indirect Cost: ¥3,900,000)
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| Keywords | FPGA / Radio Telescope / Digital Signal / Spectrometer / FFT / RNS / Deep Learning / CNN / 電波天文 / 分光器 / 深層学習 / 信号処理 / 計算機システム / 再構成可能LSI / Signal Processing / DSP |
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| Outline of Final Research Achievements |
We implemented an algorithm in which the operation order of spectrometers has been changed and an FFT circuit based on Residue Number System (RNS) is applied to the existing FPGA board (ROACH2 board), which is an existing facility. We compared it with the existing spectrometer released by CASPER (The Collaboration for Astronomy Signal Processing and Electronics Research). A 50 times wider and 2^16 points resolution spectrometer was realized by our development technologies. The data classifier after observation was realized for a CNN (Convolutional Neural Network). We reduced the size of CNN hardware by binary precision and sparse (Ternary, pruning zero weights) and clarified the practicability of FPGA implementation.
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| Academic Significance and Societal Importance of the Research Achievements |
次世代電波望遠鏡用分光器を現行のROACH2 FPGAボード1台で実現できることができる. 本研究では, 提案回路の応用を電波望遠鏡としているが, ドップラー効果を利用した応用(CTスキャナ, 海洋レーダ, 気象レーダ等)に転用する事が可能となった.
また, 観測後のデータを要（測定対象）／不要に分類するDeep Learningの一種であるConvolutional Neural Network (CNN)のFPGA化に適したハードウェア削減・高速化手法を研究開発できたため, 帯域・実装コストの削減が可能となり, 監視カメラ・自動運転・ロボット・ドローン等へと適用可能となった.
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Report
(5 results)
Research Products
(28 results)
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[Journal Article] BRein Memory: A Single-Chip Binary/Ternary Reconfigurable in-Memory Deep Neural Network Accelerator Achieving 1.4 TOPS at 0.6 W2018
Author(s)
Kota Ando, Kodai Ueyoshi, Kentaro Orimo, Haruyoshi Yonekawa, Shimpei Sato, Hiroki Nakahara, Shinya Takamaeda-Yamazaki, Masayuki Ikebe, Tetsuya Asai, Tadahiro Kuroda, Masato Motomura
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Journal Title
IEEE Journal of Solid-State Circuits
Volume: 53(4)
Pages: 983-994
Related Report
Peer Reviewed
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