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Self-assembled monolayer-based gate dielectrics in MIS structure and its application to functional nano-electronic devices

Research Project

Project/Area Number 15H06204
Research Category

Grant-in-Aid for Research Activity Start-up

Allocation TypeSingle-year Grants
Research Field Electron device/Electronic equipment
Research InstitutionTokyo Institute of Technology

Principal Investigator

Kawanago Takamasa  東京工業大学, 科学技術創成研究院, 助教 (30726633)

Research Collaborator Oda Shunri  
Du Wanjing  
Ikoma Ryo  
Project Period (FY) 2015-08-28 – 2017-03-31
Project Status Completed (Fiscal Year 2016)
Budget Amount *help
¥2,990,000 (Direct Cost: ¥2,300,000、Indirect Cost: ¥690,000)
Fiscal Year 2016: ¥1,430,000 (Direct Cost: ¥1,100,000、Indirect Cost: ¥330,000)
Fiscal Year 2015: ¥1,560,000 (Direct Cost: ¥1,200,000、Indirect Cost: ¥360,000)
Keywords自己組織化単分子膜 / 二硫化モリブデン / 電界効果トランジスタ / 界面特性 / 自己組織化 / ナノデバイス / 2次元材料 / マイクロ・ナノデバイス / 先端機能デバイス / 電子デバイス・機器
Outline of Final Research Achievements

In this study, we apply self-assembled-monolayer (SAM)-based gate dielectrics to the fabrication of molybdenum disulfide (MoS2) field-effect transistors. A simple fabrication process involving the selective formation of a SAM on metal oxides in conjunction with the dry transfer of MoS2 flakes was established. A subthreshold slope (SS) of 69 mV/dec and no hysteresis were demonstrated with the ultrathin SAM-based gate dielectrics accompanied by a low gate leakage current. The small SS and no hysteresis indicate the superior interfacial properties of the MoS2/SAM structure. Cross-sectional transmission electron microscopy revealed a sharp and abrupt interface of the MoS2/SAM structure. The SAM-based gate dielectrics are found to be applicable to the fabrication of low-voltage MoS2 field-effect transistors and can also be extended to various layered semiconductor materials. This study opens up intriguing possibilities of SAM-based gate dielectrics in functional electronic devices.

Report

(3 results)
  • 2016 Annual Research Report   Final Research Report ( PDF )
  • 2015 Annual Research Report
  • Research Products

    (11 results)

All 2017 2016

All Journal Article (2 results) (of which Peer Reviewed: 2 results,  Acknowledgement Compliant: 2 results) Presentation (9 results) (of which Int'l Joint Research: 4 results,  Invited: 2 results)

  • [Journal Article] Use of self-assembled monolayers for selective metal removal and ultrathin gate dielectrics in MoS2 field-effect transistors2017

    • Author(s)
      Wanjing Du, Takamasa Kawanago, and Shunri Oda
    • Journal Title

      Japanese Journal of Applied Physics

      Volume: 56 Issue: 4S Pages: 04CP10-04CP10

    • DOI

      10.7567/jjap.56.04cp10

    • NAID

      210000147672

    • Related Report
      2016 Annual Research Report
    • Peer Reviewed / Acknowledgement Compliant
  • [Journal Article] Utilizing self-assembled-monolayer-based gate dielectrics to fabricate molybdenum disulfide field-effect transistors2016

    • Author(s)
      Takamasa Kawanago and Shunri Oda
    • Journal Title

      APPLIED PHYSICS LETTERS

      Volume: 108 Issue: 4

    • DOI

      10.1063/1.4941084

    • Related Report
      2015 Annual Research Report
    • Peer Reviewed / Acknowledgement Compliant
  • [Presentation] 自己組織化単分子膜を用いたadhesion lithographyによるMoS2 FETの作製2017

    • Author(s)
      川那子 高暢,居駒 遼,Wanjing Du,小田 俊理
    • Organizer
      第64回応用物理学会春季学術講演会
    • Place of Presentation
      パシフィコ横浜
    • Year and Date
      2017-03-14
    • Related Report
      2016 Annual Research Report
  • [Presentation] WSe2 P-type Transistors Fabricated by Self-Assembled Monolayer for Contact Metal Patterning and Ultrathin Gate Dielectrics2016

    • Author(s)
      Wanjing Du, Takamasa Kawanago, and Shunri Oda
    • Organizer
      SISC 2016
    • Place of Presentation
      San Diego, CA
    • Year and Date
      2016-12-07
    • Related Report
      2016 Annual Research Report
    • Int'l Joint Research
  • [Presentation] Self-Assembled Monolayer-based Gate Dielectrics for MoS2 FET2016

    • Author(s)
      Takamasa Kawanago, and Shunri Oda
    • Organizer
      230th ECS Meeting
    • Place of Presentation
      Honolulu, Hawaii
    • Year and Date
      2016-10-02
    • Related Report
      2016 Annual Research Report
    • Int'l Joint Research / Invited
  • [Presentation] Using Self-Assembled Monolayers for Selective Metal Removing and Ultrathin Gate Dielectrics in MoS2 Field-Effect Transistors2016

    • Author(s)
      Wanjing Du, Takamasa Kawanago, and Shunri Oda
    • Organizer
      SSDM 2016
    • Place of Presentation
      EPOCHAL TSUKUBA
    • Year and Date
      2016-09-26
    • Related Report
      2016 Annual Research Report
    • Int'l Joint Research
  • [Presentation] Multifunctional Phosphonic Acid Self-Assembled Monolayer for Metal Patterning and Ultrathin Gate Dielectrics in Fabrication of MoS2 Field-Effect Transistors2016

    • Author(s)
      杜 婉静, 川那子 高暢, 小田 俊理
    • Organizer
      第77回応用物理学会秋季学術講演会
    • Place of Presentation
      朱鷺メッセ
    • Year and Date
      2016-09-13
    • Related Report
      2016 Annual Research Report
  • [Presentation] Adhesion Lithography to fabricate MoS2 FETs with Self-Assembled Monolayer-based Gate Dielectrics2016

    • Author(s)
      Takamasa Kawanago, Ryo Ikoma, Du Wanjing, and Shunri Oda
    • Organizer
      ESSDERC 2016
    • Place of Presentation
      Lausanne, Switzerland
    • Year and Date
      2016-09-12
    • Related Report
      2016 Annual Research Report
    • Int'l Joint Research
  • [Presentation] 自己組織化単分子膜をゲート絶縁膜に用いた低電圧駆動MoS2 FETの作製2016

    • Author(s)
      川那子 高暢、小田 俊理
    • Organizer
      応用物理学会シリコンテクノロジー分科会
    • Place of Presentation
      東京工業大学田町キャンパス
    • Year and Date
      2016-06-29
    • Related Report
      2016 Annual Research Report
    • Invited
  • [Presentation] 自己組織化単分子膜をゲート絶縁膜に用いた低電圧駆動MoS2 FETの作製2016

    • Author(s)
      川那子高暢,小田俊理
    • Organizer
      第63回応用物理学会春季学術講演会
    • Place of Presentation
      東京工業大学大岡山キャンパス
    • Year and Date
      2016-03-19
    • Related Report
      2015 Annual Research Report
  • [Presentation] ジデシルホスホン酸(C12H25-PA)をゲート絶縁膜に用いたMoS2 FETの作製2016

    • Author(s)
      居駒 遼、川那子 高暢、小田 俊理
    • Organizer
      第77回応用物理学会秋季学術講演会
    • Place of Presentation
      朱鷺メッセ
    • Related Report
      2016 Annual Research Report

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Published: 2015-08-26   Modified: 2018-03-22  

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