Microcomputer with Embedded Field Programmable Device for Peripherals
| Project/Area Number |
15K00072
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| Research Category |
Grant-in-Aid for Scientific Research (C)
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| Allocation Type | Multi-year Fund |
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| Section | 一般 |
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| Research Field |
Computer system
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| Research Institution | Kanazawa University |
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Principal Investigator |
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| Project Period (FY) |
2015-04-01 – 2018-03-31
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| Project Status |
Completed (Fiscal Year 2017)
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| Budget Amount *help |
¥3,380,000 (Direct Cost: ¥2,600,000、Indirect Cost: ¥780,000)
Fiscal Year 2017: ¥2,210,000 (Direct Cost: ¥1,700,000、Indirect Cost: ¥510,000)
Fiscal Year 2016: ¥780,000 (Direct Cost: ¥600,000、Indirect Cost: ¥180,000)
Fiscal Year 2015: ¥390,000 (Direct Cost: ¥300,000、Indirect Cost: ¥90,000)
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| Keywords | リコンフィギャラブルシステム / マイクロコンピュータ / プログラマブルデバイス / シーケンサ / メモリ |
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| Outline of Final Research Achievements |
We have developed a new memory based reconfigurable device for microcomputer peripherals in a unit of megabit class embedded memory adding a few registers to a decoder part of memory. The essential parts of the proposed device were implemented on a FPGA and several microcomputer peripherals, for example, counters, timers, PWMs (Pulse Width Modulation), FIFOs (First In First Out), and etc., were reconfigured on the FPGA. The peripherals functions are verified on the implemented device on the FPGA. The proposed device was applied to a packet filter for virus check or a buffer memory for communications and verified that the device is useful not only for microcomputer peripherals but also for other systems.
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Report
(4 results)
Research Products
(10 results)
