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Study on LSI design technology to detect Trojan circuit inserted during manufacturing process

Research Project

Project/Area Number 15K00086
Research Category

Grant-in-Aid for Scientific Research (C)

Allocation TypeMulti-year Fund
Section一般
Research Field Computer system
Research InstitutionKyoto Sangyo University

Principal Investigator

YOSHIMURA Masayoshi  京都産業大学, コンピュータ理工学部, 准教授 (90452820)

Project Period (FY) 2015-04-01 – 2018-03-31
Project Status Completed (Fiscal Year 2017)
Budget Amount *help
¥4,420,000 (Direct Cost: ¥3,400,000、Indirect Cost: ¥1,020,000)
Fiscal Year 2017: ¥1,300,000 (Direct Cost: ¥1,000,000、Indirect Cost: ¥300,000)
Fiscal Year 2016: ¥1,820,000 (Direct Cost: ¥1,400,000、Indirect Cost: ¥420,000)
Fiscal Year 2015: ¥1,300,000 (Direct Cost: ¥1,000,000、Indirect Cost: ¥300,000)
Keywordsトロイ回路 / トロイ検査用回路 / 応答圧縮器 / パタン生成器 / 論理的回路分割 / 回路構造情報 / 情報の保護 / ハードウェアトロイ回路 / トロイ検出用回路 / LSI / 挿入箇所探索アルゴリズム / ベンチマーク回路 / 応答圧縮回路
Outline of Final Research Achievements

In a social information infrastructure system in which a large number of LSIs are used, Trojan LSIs might cause invalidation of normal functions, leakage or tampering of confidential information. However, there is no means to guarantee that the manufactured LSI does not contain a Trojan circuit. From the aspect of safety and security as well as economics, we have worked on establishing a technology to distinguish authentic LSI and Trojan LSI as a measure to prevent Trojan LSI.
Two main research topics are as follows. (1) development of a method for generating comprehensive information on the circuit structure within the manufactured LSI, and (2) study on a mechanism for protecting the information of the output circuit structure. By achieving these research topics, we established the basic technology of a mechanism that can distinguish whether the manufactured LSIs are authentic LSIs or Trojan LSIs based on the design data of authentic LSI.

Report

(4 results)
  • 2017 Annual Research Report   Final Research Report ( PDF )
  • 2016 Research-status Report
  • 2015 Research-status Report
  • Research Products

    (22 results)

All 2018 2017 2016 2015

All Journal Article (1 results) (of which Peer Reviewed: 1 results) Presentation (21 results) (of which Int'l Joint Research: 9 results)

  • [Journal Article] A Don't Care Filling Method for Low Capture Power based on Correlation of FF Transitions Using SAT2017

    • Author(s)
      Masayoshi YOSHIMURA, Yoshiyasu TAKAHASHI, Hiroshi YAMAZAKI, Toshinori HOSOKAWA
    • Journal Title

      IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

      Volume: E100.A Issue: 12 Pages: 2824-2833

    • DOI

      10.1587/transfun.E100.A.2824

    • NAID

      130006236532

    • ISSN
      0916-8508, 1745-1337
    • Related Report
      2017 Annual Research Report
    • Peer Reviewed
  • [Presentation] A Test Register Assignment Method to Reduce the Number of Test Patterns Using Controller Augmentation2018

    • Author(s)
      Shun Takeda, Toshinori Hosokawa, Hiroshi Yamazaki, and Masayoshi Yoshimura
    • Organizer
      DUHDe 2018 ― 5th Workshop on Design Automation for Understanding Hardware Designs
    • Related Report
      2017 Annual Research Report
    • Int'l Joint Research
  • [Presentation] A Secure Design Method to Detect for Trojan Circuit inserted in Manufacturing Process2018

    • Author(s)
      Yoshinobu Okuda, Masayoshi Yoshimura, Kohei Ohyama, and Toshinori Hosokawa
    • Organizer
      DUHDe 2018 ― 5th Workshop on Design Automation for Understanding Hardware Designs
    • Related Report
      2017 Annual Research Report
    • Int'l Joint Research
  • [Presentation] コントローラ拡大 を用いた遷移故障テストパターン数削減のための演算器のテストレジスタ割当 て法2018

    • Author(s)
      竹内 勇希, 武田 俊, 細川 利典, 山崎 紘史, 吉村 正義
    • Organizer
      ディペンダブルコンピューティング研究会
    • Related Report
      2017 Annual Research Report
  • [Presentation] トロイ回路を検知する回路の挿入箇所探索手法2017

    • Author(s)
      奥田良宣,吉村正義(京都産大)
    • Organizer
      第9回LSIテストセミナー
    • Place of Presentation
      福岡市・筑紫会館
    • Year and Date
      2017-03-09
    • Related Report
      2016 Research-status Report
  • [Presentation] 到達不能状態を用いたSATベース順序回路のテスト不能故障判定法2017

    • Author(s)
      二関森人・細川利典(日大)・吉村正義(京都産大)・新井雅之(日大)・四柳浩之・橋爪正樹(徳島大)
    • Organizer
      ディペンダブルコンピューティング研究会
    • Place of Presentation
      東京都・機械振興会館
    • Year and Date
      2017-02-21
    • Related Report
      2016 Research-status Report
  • [Presentation] A Hardware Trojan Circuit Detection Method Using Activation Sequence Generations2017

    • Author(s)
      Masayoshi Yoshimura(Kyoto Sangyo University), Tomohiro Bouyashiki, and Toshinori Hosokawa(Nihon University)
    • Organizer
      The 22nd IEEE Pacific Rim International Symposium on Dependable Computing (PRDC 2017)
    • Place of Presentation
      Christchurch, New Zealand
    • Year and Date
      2017-01-22
    • Related Report
      2016 Research-status Report
    • Int'l Joint Research
  • [Presentation] Controller augmentation and test point insertion at RTL for concurrent operational unit testing2017

    • Author(s)
      Toshinori Hosokawa, Shun Takeda, Hiroshi Yamazaki, and Masayoshi Yoshimura
    • Organizer
      2017 IEEE 23rd International Symposium on On-Line Testing and Robust System Design (IOLTS)
    • Related Report
      2017 Annual Research Report
    • Int'l Joint Research
  • [Presentation] A Sequentially Untestable Fault Identification Method Based on State Cube Justification2017

    • Author(s)
      Morito Niseki, Toshinori Hosokawa, Hiroshi Yamazaki, Masayuki Arai, Masayoshi Yoshimura, Hiroyuki Yotsuyanagi and Masaki Hashizume
    • Organizer
      IEEE The Eighteenth Workshop on RTLT and High Level Testing 2017
    • Related Report
      2017 Annual Research Report
    • Int'l Joint Research
  • [Presentation] A Low Power Oriented Static Test Compaction Method Based on Don't Care Bits2017

    • Author(s)
      Sayuri Ochi, Hiroshi Yamazaki, Toshinori Hosokawa, Masayoshi Yoshimura
    • Organizer
      IEEE The Eighteenth Workshop on RTLT and High Level Testing 2017
    • Related Report
      2017 Annual Research Report
    • Int'l Joint Research
  • [Presentation] フリップフロップ組合せの状態正当化による到達不能状態を用いた順 序回路のテスト不能故障判定法2017

    • Author(s)
      二関 森人, 細川 利典, 吉村 正義, 山崎 紘史, 新井 雅之, 四柳 浩之, 橋爪 正樹
    • Organizer
      DAシンポジウム2017
    • Related Report
      2017 Annual Research Report
  • [Presentation] ドントケアを用いたキャ プチャセーフテスト集合の静的テスト圧縮法2017

    • Author(s)
      越智 小百合, 山崎 紘史, 細川 利典, 吉村 正義
    • Organizer
      DAシンポジウム2017
    • Related Report
      2017 Annual Research Report
  • [Presentation] IPコアの論理暗号化法の復号化鍵数の評価2017

    • Author(s)
      橋立 英実, 細川 利典, 吉村正義
    • Organizer
      デザインガイア2017
    • Related Report
      2017 Annual Research Report
  • [Presentation] コントローラ拡大を用いたレ ジスタ転送レベルにおけるテストパターン数削減のためのハードウェア要素の テストレジスタ割当て法2017

    • Author(s)
      武田 俊, 細川 利典, 山崎 紘史, 吉村 正義
    • Organizer
      デザインガイア2017
    • Related Report
      2017 Annual Research Report
  • [Presentation] 製造過程でのトロイ回路混入を検知する 設計手法2017

    • Author(s)
      奥田 良宣, 吉村 正義, 大山 浩平
    • Organizer
      デザインガイア2017
    • Related Report
      2017 Annual Research Report
  • [Presentation] A Design for Testability Method at RTL for Concurrent Operational Unit Testing2016

    • Author(s)
      Shun Takeda, Toshinori Hosokawa, Hiroshi Yamazaki (Nihon University) and Masayoshi Yoshimura (Kyoto Sangyo University)
    • Organizer
      IEEE The Seventeenth Workshop on RTL and High Level Testing
    • Place of Presentation
      Aki Grand Hotel, Hiroshima, Japan
    • Year and Date
      2016-11-24
    • Related Report
      2016 Research-status Report
    • Int'l Joint Research
  • [Presentation] トロイ回路を検知する回路の考察2016

    • Author(s)
      大山浩平, 吉村正義
    • Organizer
      第8回LSIテストセミナー
    • Place of Presentation
      電気ビル共創館(福岡県福岡市)
    • Year and Date
      2016-03-02
    • Related Report
      2015 Research-status Report
  • [Presentation] 静的テスト圧縮のための多重目標故障テスト生成を用いたMバイNアルゴリズム2015

    • Author(s)
      原侑也, 山崎紘史, 細川利典, 吉村正義
    • Organizer
      デザインガイア2015
    • Place of Presentation
      長崎県勤労福祉会館(長崎県長崎市)
    • Year and Date
      2015-12-03
    • Related Report
      2015 Research-status Report
  • [Presentation] A Sequence Generation Method to detect Hardware Trojan Circuits2015

    • Author(s)
      Masayoshi Yoshimura, Tomohiro Bouyashiki and Toshinori Hosokawa
    • Organizer
      16th IEEE Workshop on RTL and High Level Testing 2015
    • Place of Presentation
      Indian Institute of Technology Bombay, Bombay, India
    • Year and Date
      2015-11-25
    • Related Report
      2015 Research-status Report
    • Int'l Joint Research
  • [Presentation] A Don’t Care Filling Method to Reduce Capture Power based on Correlation of FF Transitions2015

    • Author(s)
      Masayoshi Yoshimura, Yoshiyasu Takahashi, Hiroshi Yamazaki and Toshinori Hosokawa
    • Organizer
      24th IEEE Asian Test Symposium 2015
    • Place of Presentation
      Indian Institute of Technology Bombay, Bombay, India
    • Year and Date
      2015-11-23
    • Related Report
      2015 Research-status Report
    • Int'l Joint Research
  • [Presentation] VLSI設計工程時における未遷移信号線情報に基づいたトロイ回路検出法2015

    • Author(s)
      坊屋鋪知拓,細川利典,吉村正義
    • Organizer
      DAシンポジウム2015
    • Place of Presentation
      山代温泉 ゆのくに天祥(石川県加賀市)
    • Year and Date
      2015-08-28
    • Related Report
      2015 Research-status Report
  • [Presentation] BASTにおけるスキャンスライスに基づくテストデータ削減法2015

    • Author(s)
      錦織誠, 山崎紘史, 細川利典, 新井雅之, 吉村正義
    • Organizer
      ディペンダブルコンピューティング研究会
    • Place of Presentation
      機械振興会館, 東京都
    • Year and Date
      2015-06-16
    • Related Report
      2015 Research-status Report

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Published: 2015-04-16   Modified: 2019-03-29  

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