Study on fully digital ternary content addressable memory for high-speed processing of the big data.
Project/Area Number |
15K06021
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Research Category |
Grant-in-Aid for Scientific Research (C)
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Allocation Type | Multi-year Fund |
Section | 一般 |
Research Field |
Electron device/Electronic equipment
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Research Institution | Kyushu Institute of Technology |
Principal Investigator |
NAKAMURA KAZUYUKI 九州工業大学, マイクロ化総合技術センター, 教授 (60336097)
|
Project Period (FY) |
2015-10-21 – 2018-03-31
|
Project Status |
Completed (Fiscal Year 2017)
|
Budget Amount *help |
¥4,550,000 (Direct Cost: ¥3,500,000、Indirect Cost: ¥1,050,000)
Fiscal Year 2017: ¥1,300,000 (Direct Cost: ¥1,000,000、Indirect Cost: ¥300,000)
Fiscal Year 2016: ¥1,690,000 (Direct Cost: ¥1,300,000、Indirect Cost: ¥390,000)
Fiscal Year 2015: ¥1,560,000 (Direct Cost: ¥1,200,000、Indirect Cost: ¥360,000)
|
Keywords | TCAM / SRAM / 素子劣化 / レシオレス / ばらつき / 動作マージン / 低電圧 / 連想メモリ / CAM / 低消費電力 / 検索 / ハードウエアエンジン / 超低電圧 |
Outline of Final Research Achievements |
A fully digital ternary content addressable memory (TCAM) using the ratioless static random access memory (RL-SRAM) technology and fully complementary hierarchical-AND matching comparators (HAMCs) was developed. Since its fully complementary and digital operation enables the effect of device variabilities to be avoided, it can operate with a quite low supply voltage. A test chip incorporating a conventional TCAM and a proposed 24-transistor ratioless TCAM (RL-TCAM) cells and HAMCs was developed using a 0.18um CMOS process. The minimum operating voltage of 0.25V of the developed RL-TCAM is less than half of that of the conventional TCAM.
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Report
(4 results)
Research Products
(6 results)