Studies on Design of Reliable Asynchronous Circuits for Transient Fault Tolerance in the Field
| Project/Area Number |
15K15961
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| Research Category |
Grant-in-Aid for Young Scientists (B)
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| Allocation Type | Multi-year Fund |
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| Research Field |
Computer system
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| Research Institution | Hiroshima City University |
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Principal Investigator |
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| Project Period (FY) |
2015-04-01 – 2019-03-31
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| Project Status |
Completed (Fiscal Year 2018)
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| Budget Amount *help |
¥3,120,000 (Direct Cost: ¥2,400,000、Indirect Cost: ¥720,000)
Fiscal Year 2017: ¥1,040,000 (Direct Cost: ¥800,000、Indirect Cost: ¥240,000)
Fiscal Year 2016: ¥1,040,000 (Direct Cost: ¥800,000、Indirect Cost: ¥240,000)
Fiscal Year 2015: ¥1,040,000 (Direct Cost: ¥800,000、Indirect Cost: ¥240,000)
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| Keywords | 非同期式回路 / 高位合成 / 一時故障 / ソフトエラー / 劣化故障 / 遅延故障 / ディペンダブルコンピューティング / フォールトトレランス / 耐故障設計 / エラー検出 / エラー訂正 / 演算器バインディング / 4相2線式 / ハンドシェイク遅延 / スケジューリング / 演算チェイニング |
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| Outline of Final Research Achievements |
Asynchronous circuits have drawn attention as alternatives to synchronous ones which are widely used in current digital systems. This work has investigate high-level synthesis for enhancing the reliability of asynchronous circuits in the field where transient faults and aging-induced ones are likely to occur. More specifically, focusing on four-phase dual-rail asynchronous circuits that essentially have robustness against the delay-variation caused by transient faults or aging-induced ones, this work has devised operational unit binding for reducing handshake-delay or enhancing the tolerability to aging-induced faults in the circuits.
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| Academic Significance and Societal Importance of the Research Achievements |
本研究の取り組みは，高信頼な非同期式回路を効率良く設計し実用化を進めるための基礎となるものである．民生機器や医療機器等，その用途によって要求される信頼度は様々であるが，本研究の成果を応用することで，用途に応じた「ちょうど良い」特性（面積・遅延・消費電力・信頼度等）を持つ非同期式回路を設計することが可能となる．これは，同期式回路と非同期式回路が混在した次世代のシステムの信頼性を低コストで高めることにもつながる．
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Report
(5 results)
Research Products
(3 results)
