Research on High-performance Intelligent Network for Cluster Computing
| Project/Area Number |
16300012
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| Research Category |
Grant-in-Aid for Scientific Research (B)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
Computer system/Network
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| Research Institution | University of Tsukuba |
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Principal Investigator |
WADA Koichi University of Tsukuba, Graduate school of system and Information Engineering, Professor, 大学院システム情報工学研究科, 教授 (30175145)
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| Project Period (FY) |
2004 – 2006
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| Project Status |
Completed (Fiscal Year 2006)
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| Budget Amount *help |
¥14,900,000 (Direct Cost: ¥14,900,000)
Fiscal Year 2006: ¥2,100,000 (Direct Cost: ¥2,100,000)
Fiscal Year 2005: ¥3,300,000 (Direct Cost: ¥3,300,000)
Fiscal Year 2004: ¥9,500,000 (Direct Cost: ¥9,500,000)
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| Keywords | cluster computers / network / high-performance communication / link layer / compiler / shared-memory parallel program / protocol / performance evaluation |
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| Research Abstract |
Cluster computers have become the vehicle of choice to build high performance computing environments. To fully exploit the computing power of these environments, one must utilize high performance network and protocol technologies, since the communication patterns of parallel applications running on clusters require low latency and high throughput, not achievable by using the conventional network technologies. Although existing cluster networks deliver high communication performance, the host processors still consume much computing resources to control communication hardware. This disturbs the host processor to perform calculation of an application and results in the performance degradation of a cluster.
In this research, high performance cluster network system has been developed. The proposed network is composed of network interfaces (NI) and switch boxes (SB). Both NI and SB include a general purpose processor and a high-capacity memory, which are tightly coupled with the dedicated communication hardware. Our network has a capability of executing large software modules that are used to be processed on a host processor. The pre/post communication processing as well as protocol processing can be executed on the network system. This enables a host processor to be freed from communication burden, and a communication to be overlapped with computation in high degree. We have also developed a message passing library that can extract maximal performance of the network, and the compiler that can generate message passing instructions from shared-memory parallel programs by analyzing dependencies among read and write accesses to shared arrays. Performance evaluation has been done by using several parallel application programs.
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Report
(4 results)
Research Products
(36 results)
