| Project/Area Number |
16560309
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| Research Category |
Grant-in-Aid for Scientific Research (C)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
Electron device/Electronic equipment
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| Research Institution | Chuo University |
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Principal Investigator |
TAKAKUBO Hajime Chuo University, Faculty of Science and Engineering, Professor (90245796)
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| Project Period (FY) |
2004 – 2007
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| Project Status |
Completed (Fiscal Year 2007)
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| Budget Amount *help |
¥3,940,000 (Direct Cost: ¥3,700,000、Indirect Cost: ¥240,000)
Fiscal Year 2007: ¥1,040,000 (Direct Cost: ¥800,000、Indirect Cost: ¥240,000)
Fiscal Year 2006: ¥700,000 (Direct Cost: ¥700,000)
Fiscal Year 2005: ¥700,000 (Direct Cost: ¥700,000)
Fiscal Year 2004: ¥1,500,000 (Direct Cost: ¥1,500,000)
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| Keywords | Low voltage analog circuits / On-chip temperature sensor / Low power analog circuit / Voltage detector / Subthreshold MOSFET / Low leakage MOSFET / Voltage reference / Fourquadrant-input analog multiplier / 基準電流発生回路 / CMOS温度センサ / 4象限掛け算回路 / オンチップセンサ / 掛け算回路 |
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| Research Abstract |
A core technology for an implementation of system LSI applying a low voltage and low power CMOS analog integrated circuits can be studied. The core technology can be performed by (1) Low voltage analog circuitry, (2) Low power analog circuitry and (3) Automated analog system LSI design method.
As a Low voltage analog circuitry (1), a four-quadrant-input linear transconductor employing source and sink currents pair for analog multiplier and a CMOS linear-voltage-output temperature sensor based on characteristic of zero-temperature-coefficient point for communication system LSI are proposed. These researches are published as papers and presentations.
As a low power analog circuitry (2), a CMOS temperature-to-pulse-width converter with a current comparator, a low power consumption voltage detector (0.6V, 30nW) and a PTAT circuit using characteristic of subthreshold MOSFET are proposed. In addition, a consideration of leakage current suppression of MOSFET in off-state is also proposed, in order to reduce standby power consumption. These studies are effective for the implementation of analog system LSI under the conventional fabrication technology. These researches are published as papers and presentations.
Considering practical problems for an automated analog system LSI design method (3) and considering accurate modeling of the subthreshold MOSFET are feature works.
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