Studies on hardware assist of floating point function calculation
| Project/Area Number |
16H02795
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| Research Category |
Grant-in-Aid for Scientific Research (B)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
Computer system
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| Research Institution | Kyoto University |
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Principal Investigator |
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| Co-Investigator(Kenkyū-buntansha) |
高木 一義 三重大学, 工学研究科, 教授 (70273844)
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| Project Period (FY) |
2016-04-01 – 2020-03-31
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| Project Status |
Completed (Fiscal Year 2019)
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| Budget Amount *help |
¥15,340,000 (Direct Cost: ¥11,800,000、Indirect Cost: ¥3,540,000)
Fiscal Year 2019: ¥3,380,000 (Direct Cost: ¥2,600,000、Indirect Cost: ¥780,000)
Fiscal Year 2018: ¥4,030,000 (Direct Cost: ¥3,100,000、Indirect Cost: ¥930,000)
Fiscal Year 2017: ¥3,770,000 (Direct Cost: ¥2,900,000、Indirect Cost: ¥870,000)
Fiscal Year 2016: ¥4,160,000 (Direct Cost: ¥3,200,000、Indirect Cost: ¥960,000)
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| Keywords | 計算機システム / 関数計算 / 浮動小数点演算 / FPGA / 逆三角関数 / ＦＰＧＡ / 指数・対数関数計算 / 正弦・余弦関数計算 |
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| Outline of Final Research Achievements |
For exponential function, logarithmic function, and sine / cosine function, we have developed calculation methods suitable for FPGA implementation which realize correct rounding, by combining high-radix STL or ultra-high-radix CORDIC with low-order polynomial approximation and table-based rounding error correction. We have shown construction methods of dedicated circuits consisting of look-up tables and rectangular multipliers on FPGA.
For inverse sine / inverse cosine function, we have newly proposed a high-radix CORDIC method, and have shown a construction method of a dedicated circuit consisting of look-up tables and rectangular multipliers on FPGA.
We have developed a method of constructing an adder that can detect an output error due to a single failure in the circuit during normal operation and can easily detect a failure in the circuit.
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| Academic Significance and Societal Importance of the Research Achievements |
科学技術計算において現れる倍精度浮動小数点関数計算を通常の倍精度浮動小数点演算器等を用いてソフトウェアで行うには、多大な計算時間とエネルギーを要する。本研究で開発したFPGA実現向きの高精度関数計算手法は、コンピュータに書き換え可能なハードウェアであるFPGAを計算アクセラレータとして付加し、対象となる科学技術計算に応じて必要な関数計算の専用回路をFPGA上に構成することにより、倍精度浮動小数点関数計算を高速にエネルギー効率よく行うことを可能にするもので、コンピュータの高性能化に寄与するものと期待できる。
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Report
(5 results)
Research Products
(9 results)
