Universal gate stack for 2D layered channel
| Project/Area Number |
16H04343
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| Research Category |
Grant-in-Aid for Scientific Research (B)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
Electron device/Electronic equipment
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| Research Institution | The University of Tokyo |
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Principal Investigator |
Nagashio Kosuke 東京大学, 大学院工学系研究科(工学部), 准教授 (20373441)
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| Project Period (FY) |
2016-04-01 – 2019-03-31
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| Project Status |
Completed (Fiscal Year 2018)
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| Budget Amount *help |
¥16,900,000 (Direct Cost: ¥13,000,000、Indirect Cost: ¥3,900,000)
Fiscal Year 2018: ¥2,860,000 (Direct Cost: ¥2,200,000、Indirect Cost: ¥660,000)
Fiscal Year 2017: ¥5,200,000 (Direct Cost: ¥4,000,000、Indirect Cost: ¥1,200,000)
Fiscal Year 2016: ¥8,840,000 (Direct Cost: ¥6,800,000、Indirect Cost: ¥2,040,000)
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| Keywords | ２次元層状材料 / トランジスタ / 絶縁膜堆積 / high-kゲート / h-BN / 2次元材料 / ゲート絶縁膜 / 2D材料 / 複合化 / 高誘電率 / 層状物質 / high-k絶縁膜 / ALD / 絶縁破壊 / 移動度 / 2次元層状半導体 / ゲートスタック |
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| Outline of Final Research Achievements |
In this study, we have introduced differen-tial-pressure-type deposition chamber, in which the feed source and the deposition chambers are separated by small aperture and can be evacuated in-dependently. By controlling the deposition condition such as deposition rate, PO2 and temperature, the insulator properties are evaluated by the I-V measurement. We demonstrate the top gate capacitance of 1.14 uF/cm2 by analyzing the I-V data for dual-gate graphene FET.
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| Academic Significance and Societal Importance of the Research Achievements |
2次元層状材料は，電子デバイス展開が期待されるが，原子層物質であるがゆえ環境に特性が敏感であり，本来の特性を得ることが難しいという問題がある．本研究では，ゲートスタックにおいて最も重要な絶縁膜堆積において酸素分離型蒸着装置を用いた特性劣化の少ない手法を開発した．今後のデバイス作製プロセスにおいて重要な役割を担うことが期待される．
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Report
(4 results)
Research Products
(55 results)
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[Presentation] "Fabrication and Surface Engineering of Two-dimensional SnS toward Piezoelectric Nanogenerator Application"2018
Author(s)
N. Higashitarumizu, H. Kawamoto, K. Ueno, K. Nagashio,
Organizer
2018 MRS Spring Meeting, (April, 4, 2018, Phoenix Convention Center, Phoenix, USA).
Related Report
Int'l Joint Research
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[Presentation] "Strongp-type SnS FETs: From Bulk to Monolayer",2018
Author(s)
N. Higashitarumizu, H. Kawamoto, K. Maruyama, M. Nakamura, K. Shimamura, N. Ohashi, K. Ueno, K. Nagashio,
Organizer
International Conference on Solid State Devices and Materials (SSDM), (September. 13, 2018, Univ. of Tokyo, Tokyo)
Related Report
Int'l Joint Research
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