Highly Efficient Processors with Tandem Hybrid Pipelines
| Project/Area Number |
16H05855
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| Research Category |
Grant-in-Aid for Young Scientists (A)
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| Allocation Type | Single-year Grants |
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| Research Field |
Computer system
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| Research Institution | The University of Tokyo (2018-2020)
Nagoya University (2016-2017) |
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Principal Investigator |
Shioya Ryota 東京大学, 大学院情報理工学系研究科, 准教授 (10619191)
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| Project Period (FY) |
2016-04-01 – 2020-03-31
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| Project Status |
Completed (Fiscal Year 2020)
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| Budget Amount *help |
¥23,530,000 (Direct Cost: ¥18,100,000、Indirect Cost: ¥5,430,000)
Fiscal Year 2019: ¥7,800,000 (Direct Cost: ¥6,000,000、Indirect Cost: ¥1,800,000)
Fiscal Year 2018: ¥6,110,000 (Direct Cost: ¥4,700,000、Indirect Cost: ¥1,410,000)
Fiscal Year 2017: ¥5,460,000 (Direct Cost: ¥4,200,000、Indirect Cost: ¥1,260,000)
Fiscal Year 2016: ¥4,160,000 (Direct Cost: ¥3,200,000、Indirect Cost: ¥960,000)
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| Keywords | プロセッサ・アーキテクチャ / 計算機アーキテクチャ / コンピュータ・アーキテクチャ / マイクロアーキテクチャ / 計算機システム |
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| Outline of Final Research Achievements |
In order to reduce power consumption, mobile devices used to be equipped with small processors called little cores. However, in recent years, with the spread of smartphones and other devices, large processors called big cores have been adopted to meet the demand for high performance. While big cores have high performance, they have a problem of high power consumption. In this research, we have studied a high-power-efficient processor that consumes as much power as a little core but has performance comparable to a big core. In this research, we have developed a low-power mode and a mode-switching algorithm that significantly improve the power efficiency. In addition, we have developed a prototype LSI to demonstrate these features.
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| Academic Significance and Societal Importance of the Research Achievements |
本研究では，Bigコアで実行してもLittleコアで実行しても大きく性能が変化しない領域がプログラム内に細粒度に存在することや，それらの性質について明らかにした．また，これを利用することでプログラム実行の際の大きく電力効率を上げられることを明らかにした．さらに，電力効率の検証を目的として行ったLSI試作では，その結果得られたプロセッサ設計をオープンソースとして公開しており，これを使用して様々な研究を行うことを可能にした．
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Report
(5 results)
Research Products
(16 results)
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[Presentation] An Open Source FPGA-Optimized Out-of-Order RISC-V Soft Processor2019
Author(s)
Susumu Mashimo, Akifumi Fujita, Reoma Matsuo, Seiya Akaki, Akifumi Fukuda, Toru Koizumi, Junichiro Kadomoto, Hidetsugu Irie, Masahiro Goshima, Koji Inoue, and Ryota Shioya
Organizer
IEEE International Conference on Field-Programmable Technology (FPT)
Related Report
Int'l Joint Research
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[Presentation] STRAIGHT: Hazardless Processor Architecture without Register Renaming2018
Author(s)
Hidetsugu Irie, Toru Koizumi, Akifumi Fukuda, Seiya Akaki, Satoshi Nakae, Yutaro Bessho, Ryota Shioya, Takahiro Notsu, Katsuhiro Yoda, Teruo Ishihara, and Shuichi Sakai
Organizer
IEEE/ACM International Symposium on Microarchitecture (MICRO 51)
Related Report
Int'l Joint Research
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