| Budget Amount *help |
¥23,530,000 (Direct Cost: ¥18,100,000、Indirect Cost: ¥5,430,000)
Fiscal Year 2019: ¥7,800,000 (Direct Cost: ¥6,000,000、Indirect Cost: ¥1,800,000)
Fiscal Year 2018: ¥6,110,000 (Direct Cost: ¥4,700,000、Indirect Cost: ¥1,410,000)
Fiscal Year 2017: ¥5,460,000 (Direct Cost: ¥4,200,000、Indirect Cost: ¥1,260,000)
Fiscal Year 2016: ¥4,160,000 (Direct Cost: ¥3,200,000、Indirect Cost: ¥960,000)
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| Outline of Final Research Achievements |
In order to reduce power consumption, mobile devices used to be equipped with small processors called little cores. However, in recent years, with the spread of smartphones and other devices, large processors called big cores have been adopted to meet the demand for high performance. While big cores have high performance, they have a problem of high power consumption. In this research, we have studied a high-power-efficient processor that consumes as much power as a little core but has performance comparable to a big core. In this research, we have developed a low-power mode and a mode-switching algorithm that significantly improve the power efficiency. In addition, we have developed a prototype LSI to demonstrate these features.
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