Budget Amount *help |
¥3,250,000 (Direct Cost: ¥2,500,000、Indirect Cost: ¥750,000)
Fiscal Year 2017: ¥1,690,000 (Direct Cost: ¥1,300,000、Indirect Cost: ¥390,000)
Fiscal Year 2016: ¥1,560,000 (Direct Cost: ¥1,200,000、Indirect Cost: ¥360,000)
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Outline of Final Research Achievements |
We are aiming at the development of FPGA architecture for high reliability and low power based on the use of MRAM technology and asynchronous architecture. It is expected to be efficiently used for automotive, communication, big data application, and artificial intelligence. We develop architectures for various applications, and consider the FPGA architecture based on the MRAM and asynchronous technologies.
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