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Development of Highly-reliable and Low-power reconfigurable VLSI Based on Asynchronous architecture and Non-volatile memory

Research Project

Project/Area Number 16K12404
Research Category

Grant-in-Aid for Challenging Exploratory Research

Allocation TypeMulti-year Fund
Research Field Computer system
Research InstitutionTohoku University

Principal Investigator

Masanori Hariyama  東北大学, 情報科学研究科, 教授 (10292260)

Project Period (FY) 2016-04-01 – 2018-03-31
Project Status Completed (Fiscal Year 2017)
Budget Amount *help
¥3,250,000 (Direct Cost: ¥2,500,000、Indirect Cost: ¥750,000)
Fiscal Year 2017: ¥1,690,000 (Direct Cost: ¥1,300,000、Indirect Cost: ¥390,000)
Fiscal Year 2016: ¥1,560,000 (Direct Cost: ¥1,200,000、Indirect Cost: ¥360,000)
KeywordsFPGA / リコンフギャラブルコンピューティング / リコンフィギャラブルコンピューティング / リコンフィギャラブルプロセッサ / 不揮発ロジック
Outline of Final Research Achievements

We are aiming at the development of FPGA architecture for high reliability and low power based on the use of MRAM technology and asynchronous architecture.
It is expected to be efficiently used for automotive, communication, big data application, and artificial intelligence. We develop architectures for various applications, and consider the FPGA architecture based on the MRAM and asynchronous technologies.

Report

(3 results)
  • 2017 Annual Research Report   Final Research Report ( PDF )
  • 2016 Research-status Report
  • Research Products

    (8 results)

All 2018 2017 2016

All Journal Article (3 results) (of which Peer Reviewed: 3 results,  Acknowledgement Compliant: 1 results) Presentation (5 results)

  • [Journal Article] An FPGA Accelerator for PatchMatch Multi-View Stereo Using OpenCL2018

    • Author(s)
      Shunsuke Tatsumi, Masanori Hariyama, Koichi Ito, Takafumi Aoki
    • Journal Title

      Journal of Real-Time Image Processing

      Volume: 1 Issue: 2 Pages: 1-13

    • DOI

      10.1007/s11554-017-0745-9

    • Related Report
      2017 Annual Research Report
    • Peer Reviewed
  • [Journal Article] Automatic Optimization of OpenCL-Based Stencil Codes for FPGAs and Its Evaluation2017

    • Author(s)
      Tsukasa Endo, Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Information Engineering Express
    • Journal Title

      Information Engineering Express

      Volume: 3 Pages: 77-90

    • Related Report
      2017 Annual Research Report
    • Peer Reviewed
  • [Journal Article] Evaluation of an OpenCL-Based FPGA Platform for Particle Filter2016

    • Author(s)
      S. Tatsumi, M. Hariyama, and N. Ikoma
    • Journal Title

      Journal of Advanced Computational Intelligence and Intelligent Informatics

      Volume: 20 Pages: 743-754

    • NAID

      130007673350

    • Related Report
      2016 Research-status Report
    • Peer Reviewed / Acknowledgement Compliant
  • [Presentation] LDAベース推論のためのFPGAアクセラレータ設計2017

    • Author(s)
      小野 泰輔,Waidyasooriya Hasitha Muthumala,張山 昌論,石垣 司
    • Organizer
      第32回信号処理シポジウム
    • Related Report
      2017 Annual Research Report
  • [Presentation] OpenCLを用いたステンシル計算用FPGAアクセラレータの最適設計2017

    • Author(s)
      遠藤 司,Waidyasooriya Hasitha Muthumala,張山 昌論
    • Organizer
      第32回信号処理シポジウム
    • Related Report
      2017 Annual Research Report
  • [Presentation] 離散最適化問題のためのFPGAベースk-out-of-n生成器の構成2017

    • Author(s)
      平舘 侑樹,Waidyasooriya Hasitha Muthumala,張山 昌論
    • Organizer
      第32回信号処理シポジウム
    • Related Report
      2017 Annual Research Report
  • [Presentation] OpenCLを用いたFDTD計算用FPGAプラットフォームの開発2016

    • Author(s)
      大寺康夫
    • Organizer
      2016年電子情報通信学会ソサイエティ大会
    • Place of Presentation
      北海道大学(北海道・札幌市)
    • Year and Date
      2016-09-21
    • Related Report
      2016 Research-status Report
  • [Presentation] OpenCLを用いた位相限定相関法のためのFPGAアクセラレータの評価2016

    • Author(s)
      張山昌論
    • Organizer
      電子情報通信学会技術報告(信学技報),リコンフィギャラブルシステム研究会
    • Place of Presentation
      富士通研究所(神奈川県・川崎市)
    • Year and Date
      2016-05-20
    • Related Report
      2016 Research-status Report

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Published: 2016-04-21   Modified: 2019-03-29  

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