Development of Highly-reliable and Low-power reconfigurable VLSI Based on Asynchronous architecture and Non-volatile memory
Project/Area Number |
16K12404
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Research Category |
Grant-in-Aid for Challenging Exploratory Research
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Allocation Type | Multi-year Fund |
Research Field |
Computer system
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Research Institution | Tohoku University |
Principal Investigator |
|
Project Period (FY) |
2016-04-01 – 2018-03-31
|
Project Status |
Completed (Fiscal Year 2017)
|
Budget Amount *help |
¥3,250,000 (Direct Cost: ¥2,500,000、Indirect Cost: ¥750,000)
Fiscal Year 2017: ¥1,690,000 (Direct Cost: ¥1,300,000、Indirect Cost: ¥390,000)
Fiscal Year 2016: ¥1,560,000 (Direct Cost: ¥1,200,000、Indirect Cost: ¥360,000)
|
Keywords | FPGA / リコンフギャラブルコンピューティング / リコンフィギャラブルコンピューティング / リコンフィギャラブルプロセッサ / 不揮発ロジック |
Outline of Final Research Achievements |
We are aiming at the development of FPGA architecture for high reliability and low power based on the use of MRAM technology and asynchronous architecture. It is expected to be efficiently used for automotive, communication, big data application, and artificial intelligence. We develop architectures for various applications, and consider the FPGA architecture based on the MRAM and asynchronous technologies.
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Report
(3 results)
Research Products
(8 results)