Development of fully autonomous error-correctable VLSI design technology and its application to brain-inspired LSI system
| Project/Area Number |
16KT0187
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| Research Category |
Grant-in-Aid for Scientific Research (C)
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| Allocation Type | Multi-year Fund |
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| Section | 特設分野 |
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| Research Field |
Intensification of Artifact Systems
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| Research Institution | Tohoku University |
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Principal Investigator |
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| Research Collaborator |
HANYU Takahiro
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| Project Period (FY) |
2016-07-19 – 2019-03-31
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| Project Status |
Completed (Fiscal Year 2018)
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| Budget Amount *help |
¥4,680,000 (Direct Cost: ¥3,600,000、Indirect Cost: ¥1,080,000)
Fiscal Year 2018: ¥1,560,000 (Direct Cost: ¥1,200,000、Indirect Cost: ¥360,000)
Fiscal Year 2017: ¥1,690,000 (Direct Cost: ¥1,300,000、Indirect Cost: ¥390,000)
Fiscal Year 2016: ¥1,430,000 (Direct Cost: ¥1,100,000、Indirect Cost: ¥330,000)
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| Keywords | 集積回路 / LSI設計技術 / ディペンダブルコンピューティング / 誤り訂正技術 / 最適化アルゴリズム / ディペンダブル・コンピューティング |
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| Outline of Final Research Achievements |
In this research, we conducted the research toward the realization of post-process oriented design technology which is based on the concept of adjusting the circuit operating point according to the process variation effect occurred after fabrication, instead of the conventional approach of assigning sufficient operation margin. As a concrete approach, we conducted the design of high-performance and highly-reliable next-generation VLSI that implements the above functions compactly by combining semiconductor device technology and spintronics device technology. Specifically, we promoted research toward establishing a design technology for the realization of next-generation VLSI with plasticity, which has the property of changing its structure and operation dynamically and autonomously in response to the operation environment.
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| Academic Significance and Societal Importance of the Research Achievements |
本研究成果を基盤とする設計技術により，高い性能が得られる可能性を有しつつも微細プロセスの高バラつき条件下においては実用に耐えないとされてきた様々な回路設計技術を，高性能VLSI実現の手段の一つとして再び活用できるようになる．これは設計における適用技術の選択肢を広げ，高性能VLSIの実現をより容易にすることにもつながる．すなわち，本技術は，単にバラつきの影響を抑え，回路性能を保証するためだけの技術ではなく，最先端プロセスが有する性能を設計者が最大限に活用できる環境を与え，従来技術では成し得ない十分な柔軟性・信頼性を有するVLSIをより容易に設計可能にする重要な技術といえる．
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Report
(4 results)
Research Products
(29 results)
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[Presentation] An FPGA-Accelerated Fully Nonvolatile Microcontroller Unit for Sensor-Node Applications in 40nm CMOS/MTJHybrid Technology Achieving 47.14μW Operation at 200MHz2019
Author(s)
M. Natsui, D. Suzuki, A. Tamakoshi, T. Watanabe, H. Honjo, H. Koike, T. Nasuno, Y. Ma, T. Tanigawa, Y. Noguchi, M. Yasuhira, H. Sato, S. Ikeda, H. Ohno, T. Endoh, and T. Hanyu
Organizer
2019 IEEE International Solid-State Circuits Conference (ISSCC2019)
Related Report
Int'l Joint Research
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