| Project/Area Number |
17201029
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| Research Category |
Grant-in-Aid for Scientific Research (A)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
Microdevices/Nanodevices
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| Research Institution | Hokkaido University |
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Principal Investigator |
TAKAHASHI Yasuo Hokkaido University, Grad.School of Inf.Sci.&Tech., Professor (90374610)
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| Co-Investigator(Kenkyū-buntansha) |
ARITA Masashi Hokkaido University, Grad.School of Inf.Sci.&Tech., Asso.Prof. (20222755)
AMEMIYA Yoshihito Hokkaido University, Grad.School of Inf.Sci.&Tech., Professor (80250489)
INOKAWA Hiroshi Shizuoka University, Research Inst.Electronics, Professor (50393757)
NISHIGUCHI Katsuhiko Ntt Coop., NTT Basic Research Labs., Researcher (00393760)
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| Project Period (FY) |
2005 – 2007
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| Project Status |
Completed (Fiscal Year 2007)
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| Budget Amount *help |
¥51,220,000 (Direct Cost: ¥39,400,000、Indirect Cost: ¥11,820,000)
Fiscal Year 2007: ¥6,110,000 (Direct Cost: ¥4,700,000、Indirect Cost: ¥1,410,000)
Fiscal Year 2006: ¥11,440,000 (Direct Cost: ¥8,800,000、Indirect Cost: ¥2,640,000)
Fiscal Year 2005: ¥33,670,000 (Direct Cost: ¥25,900,000、Indirect Cost: ¥7,770,000)
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| Keywords | Device with Few Electron Regime / Quantum Dots / Low Power Consumption / Electron Devices&Systems / Nano Materials / Silicon / Integrated Devices / Flexible Logic Gats |
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| Research Abstract |
We proposed a new flexible logic device which has multi-outputs and multi-outputs by means of a nanodot array. We first confirmed the operation principle as a flexible logic device by simulation. Then, we actually fabricated Si nanodot-array devices, and demonstrated the higher functionalities that conventional devices have never had. In addition, we developed the metal-nanodot-array-formation techniques in order to achieve smaller nanodots.
1. Simulation taking account of stochastic tunneling of single electron
We built a Monte-Carlo simulator in order to confirm the basic operation of the nanodot-array device as a flexible logic device.We clarified that the device operates as a multi-input logic gate whose function can be changed by the control gate voltage.
2. Si nanodot-array device fabrication and the evaluation of their electrical characteristics
We fabricated Si nanodot-array devices using conventional CMOS fabrication technology, in which the key processes are electron-beam lithogr
… More
aphy and thermal oxidation of Si. We made 2x2 nanodot arrays and attached two small input gates which coupled capacitively with nanodots in the array. Finally, we attached a big control gate on top of the device so as to be coupled with all the nanodots. We achieved the high functionality in which we can obtain all six important two-input logic functions by changing the control-gate voltage. We also achieved a possibility of an operation as a multi-input and multi-output device, which cannot be attained by the use of conventional devices.
3. Metal-nanodot-array formation
We investigated fabrication technologies for getting small metal nanodot arrays which have sub-ten-nanometer dot sizes. We also investigated the arrays which use ferromagnetic metal dots. The device is expected as a spin-dependent tunneling device, in which the tunneling probability is changed by the coupling among the dots or gate voltage, which may enable us to use a new additional functionality. We achieved two-dimensional metal nanodot arrays which have a few nanometer-dot sizes. Less
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