Optimal VLSI Design for a Highly-Safe Intelligent Vehicle Based on a System Integration Theory
| Project/Area Number |
17300009
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| Research Category |
Grant-in-Aid for Scientific Research (B)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
Computer system/Network
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| Research Institution | Tohoku University |
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Principal Investigator |
KAMEYAMA Michitaka Tohoku University, Graduate School of Information Sciences, Professor (70124568)
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| Co-Investigator(Kenkyū-buntansha) |
HARIYAMA Masanori Graduate School of Information Sciences, 大学院・情報科学研究科, Associate Professor (10292260)
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| Project Period (FY) |
2005 – 2007
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| Project Status |
Completed (Fiscal Year 2007)
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| Budget Amount *help |
¥13,400,000 (Direct Cost: ¥12,200,000、Indirect Cost: ¥1,200,000)
Fiscal Year 2007: ¥5,200,000 (Direct Cost: ¥4,000,000、Indirect Cost: ¥1,200,000)
Fiscal Year 2006: ¥4,300,000 (Direct Cost: ¥4,300,000)
Fiscal Year 2005: ¥3,900,000 (Direct Cost: ¥3,900,000)
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| Keywords | System-on-Chip / High-level Synthesis / Reconfigurable VLSI / Highly-Safe Intelligent Vehicle / Motion Estimation / Road Extraction / Vehicle Extraction / Human Extraction / ステレオビジョン / メモリアロケーション / 非同期アーキテクチャ / ベイジアンネットワーク / VLSIアーキテクチャ / システムレベル統合設計 / サンプリング周期 |
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| Research Abstract |
Intelligent algorithms, advanced VLSI architectures and a system integration theory are studied to develop a highly-safe intelligent vehicle.
(1) System-Application-Level Design Theory
A real-world intelligent integrated system consists of three basic modules of environment recognition, prediction or estimation, and behavior planning. A system integration theory including derivation of performance specification is studied to bridge the gap between the various design levels as well as their VLSI-oriented intelligent algorithms.
(2) Processing Module for Highly-Safe Intelligent Vehicles
VLSI-oriented algorithms for road extraction, vehicle extraction and human extraction using 3-dimensional image information are developed. Moreover, motion estimation of a vehicle is done based on Bayesian Network The problem is equivalent to estimation of a driver's intention. The driver's intentions are hierarchically defined, so that the designed Bayesian Network becomes as simple as possible. Then, causal relation between the intentions is discussed to reflect the real-world motion process.
(3) Optimal Design Theory of VLSI Processors for Intelligent Integrated Systems
To achieve power minimization under a time/area constraint, high-level synthesis techniques are investigated based on scheduling and allocation. One typical example is a parallel VLSI for 3-dimensional image processing with optimal memory allocation which solves the data transfer bottleneck between processing elements and memory modules.
(4) Reconfigurable VLSI Computing
Fine-grained reconfigurable VLSIs for real-world applications superior to the conventional FPGAs are designed and implemented based on new architectures such as direct allocation of a control-data-flow graph, a bit-serial arithmetic operation, a dynamic control of power dissipation, and a logic-in-memory architecture utilizing nonvolatile devices.
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Report
(4 results)
Research Products
(85 results)
