• Search Research Projects
  • Search Researchers
  • How to Use
  1. Back to previous page

2値・多値融合論理に基づくナノエレクトロニクスの開拓

Research Project

Project/Area Number 17650010
Research Category

Grant-in-Aid for Exploratory Research

Allocation TypeSingle-year Grants
Research Field Computer system/Network
Research InstitutionTohoku University

Principal Investigator

青木 孝文  東北大学, 大学院情報科学研究科, 教授 (80241529)

Co-Investigator(Kenkyū-buntansha) 本間 尚文  東北大学, 大学院情報科学研究科, 助手 (00343062)
Project Period (FY) 2005 – 2006
Project Status Completed (Fiscal Year 2006)
Budget Amount *help
¥3,300,000 (Direct Cost: ¥3,300,000)
Fiscal Year 2006: ¥1,600,000 (Direct Cost: ¥1,600,000)
Fiscal Year 2005: ¥1,700,000 (Direct Cost: ¥1,700,000)
Keywords計算機システム / システムオンチップ / マイクロ・ナノデバイス / VLSI設計技術 / 多値論理 / 多値情報処理 / EDA
Research Abstract

平成18年度は以下の2項目について研究を行った.
1.SET/CMOS混載回路による2値・多値融合論理システムの設計技術の開発(担当:青木および本間)
前年度に検討した方式により,SET/CMOS混載回路によって実現される2値・多値融合論理システムの設計技術を開発した.まず,本研究代表者らが提案するハードウェアアルゴリズム記述言語ARITHおよびハードウェアアルゴリズム合成用データ構造CTD (Counter Tree Diagram)を用いた上位設計フローを開発した.この設計フローでは,従来の2値論理ハードウェアアルゴリズムのみならず,多値論理に基づく新しいハードウェアアルゴリズムの記述と検証を可能にした.さらに,ここで記述された2値・多値融合論理ハードウェアアルゴリズムをSET/CMOS混載回路にマッピングすることを目的とした下位設計フローを開発した.SETの物理モデルをSmartSpiceあるいはHSPICEなどに組み込んだSET/CMOS混載回路シミュレーション手法を開発するとともに,これを用いた回路の詳細設計フローの実現を検討した.SET物理モデルの作成とパラメータのチューニングには,NTT物性科学基礎研究所の協力を得た.
2.各種応用システムの設計と総合的な性能評価(担当:青木)
前年度の主要機能モジュールの設計結果を踏まえ,比較的大規模な応用システムLSIの設計を試みた.具体的には,単電子連想メモリ(CAM)の設計を行った.ここではSETによる4値SRAMセルを使用し,時分割でマルチビット/セルのデータ読み出しを行うとともに,データの照合を多入力SET論理とCMOSプリチャージ論理で実現した.この他にも,ドントケア情報の保持・検索を可能とする単電子CAMを設計し,提案技術のインパクトを総合的に評価した.

Report

(2 results)
  • 2006 Annual Research Report
  • 2005 Annual Research Report
  • Research Products

    (14 results)

All 2006 2005

All Journal Article (14 results)

  • [Journal Article] Arithmetic Module Generator Based on Arithmetic Description Language2006

    • Author(s)
      Yuki Watanabe
    • Journal Title

      The 13th Synthesis And System Integration of Mixed Information technologies

      Pages: 153-160

    • Related Report
      2006 Annual Research Report
  • [Journal Article] Algorithm Level Interpretation of Fast Adder Structures in Binary and Multiple-Valued Logic2006

    • Author(s)
      Naofumi Homma
    • Journal Title

      The 36th IEEE International Symposium on Multiple-Valued Logic

      Pages: 2-2

    • Related Report
      2006 Annual Research Report
  • [Journal Article] A High-Density Ternary Content-Addressable Memory Using Single-Electron Transistors2006

    • Author(s)
      Katsuhiko Degawa
    • Journal Title

      The 36th IEEE International Symposium on Multiple-Valued Logic

      Pages: 19-19

    • Related Report
      2006 Annual Research Report
  • [Journal Article] High-Resolution Side-Channel Attack Using Phase-Based Waveform Matching2006

    • Author(s)
      Naofumi Homma
    • Journal Title

      Cryptographic Hardware and Embedded Systems - CHES 2006, Lecture Notes in Computer Science 4249

      Pages: 187-200

    • Related Report
      2006 Annual Research Report
  • [Journal Article] Systematic Interpretation of Redundant Arithmetic Adders in Binary and Multiple-Valued Logic2006

    • Author(s)
      Naofumi Homma
    • Journal Title

      IEICE Transactions on Electronics E89-C・11

      Pages: 1645-1654

    • Related Report
      2006 Annual Research Report
  • [Journal Article] Formal Design of Arithmetic Circuits Based on Arithmetic Description Language2006

    • Author(s)
      Naofumi Homma
    • Journal Title

      IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences E89-A・12

      Pages: 3500-3509

    • Related Report
      2006 Annual Research Report
  • [Journal Article] Formal Design of Decimal Arithmetic Circuits Using Arithmetic Description Language2006

    • Author(s)
      Yuki Watanabe
    • Journal Title

      2006 IEEE International Symposium on Intelligent Signal Processing and Communication Systems

      Pages: 419-422

    • Related Report
      2006 Annual Research Report
  • [Journal Article] A High-Density Content-Addressable Memory Using Single-Electron Transistors2006

    • Author(s)
      Katsuhiko Degawa
    • Journal Title

      Proceedings of International Symposium on Bio- and Nano - Electronics in Sendai

      Pages: 129-130

    • Related Report
      2005 Annual Research Report
  • [Journal Article] A Two-Bit-per-Cell Content-Addressable Memory Using Single-Electron Transistors2005

    • Author(s)
      Katsuhiko Degawa
    • Journal Title

      Proceedings of the 35th IEEE International Symposium on Multiple-Valued Logic

      Pages: 32-38

    • Related Report
      2005 Annual Research Report
  • [Journal Article] Graph-Based Representation for Analyzing Fast Addition Algorithms2005

    • Author(s)
      Naofumi Homma
    • Journal Title

      Proceedings of the 7th International Symposium on Representations and Methodology of Future Computing Technologies

      Pages: 52-57

    • Related Report
      2005 Annual Research Report
  • [Journal Article] Multiple-Valued Logic as a New Computing Paradigm --- A Brief Survey of Higuchi's Research on Multiple-Valued Logic2005

    • Author(s)
      Michitaka Kameyama
    • Journal Title

      Journal of Multiple-Valued Logic and Soft Computing 11・5-6

      Pages: 407-436

    • Related Report
      2005 Annual Research Report
  • [Journal Article] Design of Multiple-Valued Logic Circuits Using Graph-Based Evolutionary Synthesis2005

    • Author(s)
      Masanori Natsui
    • Journal Title

      Journal of Multiple-Valued Logic and Soft Computing 11・5-6

      Pages: 519-544

    • Related Report
      2005 Annual Research Report
  • [Journal Article] Prototype Fabrication of Field-Programmable Digital Filter LSIs Using Multiple-Valued Current-Mode Logic2005

    • Author(s)
      Katsuhiko Degawa
    • Journal Title

      Journal of Multiple-Valued Logic and Soft Computing 11・5-6

      Pages: 545-565

    • Related Report
      2005 Annual Research Report
  • [Journal Article] A Multiplier Module Generator Based on Arithmetic Description Language2005

    • Author(s)
      Naofumi Homma
    • Journal Title

      Procceedings of the IP Based SoC Design Conference & Exhibition

      Pages: 207-212

    • Related Report
      2005 Annual Research Report

URL: 

Published: 2005-04-01   Modified: 2016-04-21  

Information User Guide FAQ News Terms of Use Attribution of KAKENHI

Powered by NII kakenhi