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High-Speed and Reliable Wireline Communication System based on Plastic Waveguide

Research Project

Project/Area Number 17H03244
Research Category

Grant-in-Aid for Scientific Research (B)

Allocation TypeSingle-year Grants
Section一般
Research Field Electron device/Electronic equipment
Research InstitutionThe University of Tokyo

Principal Investigator

Iizuka Tetsuya  東京大学, 大学院工学系研究科(工学部), 准教授 (10552177)

Project Period (FY) 2017-04-01 – 2020-03-31
Project Status Completed (Fiscal Year 2020)
Budget Amount *help
¥17,680,000 (Direct Cost: ¥13,600,000、Indirect Cost: ¥4,080,000)
Fiscal Year 2019: ¥4,160,000 (Direct Cost: ¥3,200,000、Indirect Cost: ¥960,000)
Fiscal Year 2018: ¥7,410,000 (Direct Cost: ¥5,700,000、Indirect Cost: ¥1,710,000)
Fiscal Year 2017: ¥6,110,000 (Direct Cost: ¥4,700,000、Indirect Cost: ¥1,410,000)
Keywords集積回路 / ミリ波 / 通信 / 導波路 / 誘電体 / 信頼性 / 高速有線通信 / セキュリティ / 高周波
Outline of Final Research Achievements

To realize a low-cost and light-weight communication channel, several building-block circuit techniques have been proposed for the application to the high-speed wireline communication through a dielectric waveguide. We have demonstrated a small-area, low-power and low-phase-noise voltage-controlled oscillator for 140GHz band (D-band), an OOK modulator circuit that achieves low insertion loss and high ON/OFF ratio, a power amplifier circuit with high output power for reliable communication, and so on. We also implemented an antenna for communication on silicon substrate and evaluated its characteristics. The post processing technique has also been developed to remove the silicon substrate beneath the antenna in order to reduce the power loss.

Academic Significance and Societal Importance of the Research Achievements

近年の先端集積回路技術を用いることで30GHzから300GHzのミリ波帯の周波数を制御することが可能となり、誘電体材料を導波路として利用した通信経路を用いることで従来の金属配線による通信よりも軽量かつ低コストで、無線よりも安定した通信が期待される。本研究成果により、通信に必要な発振回路や増幅回路、位相同期回路と言った要素回路や、送受信アンテナの集積化と効率化のための加工技術等を確立することができた。これらの要素技術はBeyond 5Gや6Gと言った次世代の広帯域通信にも応用可能である。

Report

(4 results)
  • 2020 Final Research Report ( PDF )
  • 2019 Annual Research Report
  • 2018 Annual Research Report
  • 2017 Annual Research Report
  • Research Products

    (17 results)

All 2021 2020 2019 2018

All Journal Article (6 results) (of which Peer Reviewed: 6 results,  Open Access: 3 results) Presentation (9 results) (of which Int'l Joint Research: 5 results,  Invited: 1 results) Patent(Industrial Property Rights) (2 results) (of which Overseas: 1 results)

  • [Journal Article] 11?Gb/s 140?GHz OOK modulator with 24.6?dB isolation utilising cascaded switch and amplifier‐based stages in 65?nm bulk CMOS2020

    • Author(s)
      Yamazaki Daisuke、Otsuki Yoshitaka、Hara Takafumi、Khanh Nguyen Ngoc Mai、Iizuka Tetsuya
    • Journal Title

      IET Circuits, Devices & Systems

      Volume: 14 Issue: 3 Pages: 322-326

    • DOI

      10.1049/iet-cds.2019.0377

    • Related Report
      2019 Annual Research Report
    • Peer Reviewed
  • [Journal Article] A 3.2-to-3.8 GHz Harmonic-Mixer-Based Dual-Feedback Fractional-N PLL Achieving -65 dBc In-Band Fractional Spur2020

    • Author(s)
      Osada Masaru、Xu Zule、Iizuka Tetsuya
    • Journal Title

      IEEE Solid-State Circuits Letters

      Volume: 3 Pages: 534-537

    • DOI

      10.1109/lssc.2020.3037311

    • Related Report
      2019 Annual Research Report
    • Peer Reviewed / Open Access
  • [Journal Article] A compact quick-start sub-mW pulse-width-controlled PLL with automated layout synthesis using a place-and-route tool2019

    • Author(s)
      Jing Wang、Iizuka Tetsuya、Xu Zule、Nakura Toru
    • Journal Title

      IEICE Electronics Express

      Volume: 16 Issue: 19 Pages: 20190546-20190546

    • DOI

      10.1587/elex.16.20190546

    • NAID

      130007726347

    • ISSN
      1349-2543
    • Related Report
      2019 Annual Research Report
    • Peer Reviewed / Open Access
  • [Journal Article] A 140 GHz area-and-power-efficient VCO using frequency doubler in 65 nm CMOS2019

    • Author(s)
      Otsuki Yoshitaka、Yamazaki Daisuke、Khanh Nguyen Ngoc Mai、Iizuka Tetsuya
    • Journal Title

      IEICE Electronics Express

      Volume: 16 Issue: 6 Pages: 20190051-20190051

    • DOI

      10.1587/elex.16.20190051

    • NAID

      130007618892

    • ISSN
      1349-2543
    • Related Report
      2018 Annual Research Report
    • Peer Reviewed / Open Access
  • [Journal Article] Fault Detection of VLSI Power Supply Network Based on Current Estimation From Surface Magnetic Field2019

    • Author(s)
      Takahashi Daigo、Iizuka Tetsuya、Mai-Khanh Nguyen Ngoc、Nakura Toru、Asada Kunihiro
    • Journal Title

      IEEE Transactions on Instrumentation and Measurement

      Volume: Early Access Issue: 7 Pages: 1-12

    • DOI

      10.1109/tim.2018.2866300

    • Related Report
      2018 Annual Research Report
    • Peer Reviewed
  • [Journal Article] A 16-bit 2.0-ps Resolution Two-Step TDC in 0.18-<inline-formula> <tex-math notation="LaTeX">$\mu$ </tex-math> </inline-formula>m CMOS Utilizing Pulse-Shrinking Fine Stage With Built-In Coarse Gain Calibration2019

    • Author(s)
      Enomoto Ryuichi、Iizuka Tetsuya、Koga Takehisa、Nakura Toru、Asada Kunihiro
    • Journal Title

      IEEE Transactions on Very Large Scale Integration (VLSI) Systems

      Volume: 27 Issue: 1 Pages: 11-19

    • DOI

      10.1109/tvlsi.2018.2867505

    • Related Report
      2018 Annual Research Report
    • Peer Reviewed
  • [Presentation] Analysis of Strong-ARM Comparator with Offset Calibration Using Auxiliary Pair2021

    • Author(s)
      Shuowei Li, Zule Xu, Tetsuya Iizuka
    • Organizer
      電子情報通信学会 総合大会
    • Related Report
      2019 Annual Research Report
  • [Presentation] 低位相雑音かつ低スプリアストーンを達成する高調波ミキサを用いた二重フィードバック型フラクショナルN位相同期回路2021

    • Author(s)
      長田 将, 徐 祖楽, 飯塚 哲也
    • Organizer
      電子情報通信学会 総合大会
    • Related Report
      2019 Annual Research Report
  • [Presentation] A 3.2-to-3.8GHz Calibration-Free Harmonic-Mixer-Based Dual-Feedback Fractional-N PLL Achieving -66dBc Worst-Case In-Band Fractional Spur2020

    • Author(s)
      Masaru Osada, Zule Xu and Tetsuya Iizuka
    • Organizer
      IEEE Symposium on VLSI Circuits
    • Related Report
      2019 Annual Research Report
    • Int'l Joint Research
  • [Presentation] A 140-GHz 14-dBm Power Amplifier using Power Combiner based on Symmetric Balun in 65-nm Bulk CMOS2020

    • Author(s)
      Daisuke Yamazaki, Takamichi Horikawa and Tetsuya Iizuka
    • Organizer
      IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)
    • Related Report
      2019 Annual Research Report
    • Int'l Joint Research
  • [Presentation] A 0.0053-mm2 6-Bit Fully-Standard-Cell-Based Synthesizable SAR ADC in 65nm CMOS2019

    • Author(s)
      Naoki Ojima, Zule Xu and Tetsuya Iizuka
    • Organizer
      IEEE International New Circuits and Systems Conference (NEWCAS)
    • Related Report
      2019 Annual Research Report
    • Int'l Joint Research
  • [Presentation] スイッチ型および増幅型ステージを用いた高アイソレーションかつ低損失なDバンドOOK変調器の実装2019

    • Author(s)
      山﨑 大輔, 大槻 宜孝, 原 崇文, Nguyen Ngoc Mai-Khanh, 飯塚 哲也
    • Organizer
      電子情報通信学会 LSIとシステムのワークショップ2019
    • Related Report
      2019 Annual Research Report
  • [Presentation] A Synthesizable Digital Low-Dropout Regulator Based on Voltage-to-Time Conversion2018

    • Author(s)
      Naoki Ojima, Toru Nakura, Tetsuya Iizuka, and Kunihiro Asada
    • Organizer
      26th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)
    • Related Report
      2018 Annual Research Report
    • Int'l Joint Research
  • [Presentation] Time-Domain Approach for Analog Circuits: Fine-Resolution TDC and Quick-Start CDR Circuits2018

    • Author(s)
      Tetsuya Iizuka and Kunihiro Asada
    • Organizer
      IEEE International Conference on Advanced Technologies for Communications (ATC)
    • Related Report
      2018 Annual Research Report
    • Int'l Joint Research / Invited
  • [Presentation] 周波数2逓倍器を用いた小面積かつ低電力な140GHz電圧制御発振器の設計2018

    • Author(s)
      大槻 宜孝, 山﨑 大輔, マイカーン グエンコック, 飯塚 哲也
    • Organizer
      電子情報通信学会 集積回路研究会(ICD)
    • Related Report
      2018 Annual Research Report
  • [Patent(Industrial Property Rights)] フラクショナル位相同期回路および位相同期回路装置2020

    • Inventor(s)
      飯塚 哲也, 徐 祖楽, 長田 将
    • Industrial Property Rights Holder
      国立大学法人東京大学
    • Industrial Property Rights Type
      特許
    • Filing Date
      2020
    • Related Report
      2019 Annual Research Report
    • Overseas
  • [Patent(Industrial Property Rights)] フラクショナル位相同期回路および位相同期回路装置2019

    • Inventor(s)
      飯塚 哲也, 徐 祖楽, 長田 将
    • Industrial Property Rights Holder
      国立大学法人東京大学
    • Industrial Property Rights Type
      特許
    • Industrial Property Number
      2019-192731
    • Filing Date
      2019
    • Related Report
      2019 Annual Research Report

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Published: 2017-04-28   Modified: 2022-01-27  

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