| Budget Amount *help |
¥4,550,000 (Direct Cost: ¥3,500,000、Indirect Cost: ¥1,050,000)
Fiscal Year 2019: ¥1,690,000 (Direct Cost: ¥1,300,000、Indirect Cost: ¥390,000)
Fiscal Year 2018: ¥1,560,000 (Direct Cost: ¥1,200,000、Indirect Cost: ¥360,000)
Fiscal Year 2017: ¥1,300,000 (Direct Cost: ¥1,000,000、Indirect Cost: ¥300,000)
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| Outline of Final Research Achievements |
Several thermal design techniques of 3D ICs were developed. 1) As heat measures with heatsink, a structure that the sidewall of the stacked chips is covered with metal, a metal plate is inserted between chips, and a metal plate is located in the bottom was devised. As heat measures without heatsink, a structure of a metal hat was devised. 2) An interconnect capacitance extraction using a neural network was devised. A power supply voltage stabilization technique using the multi-objective genetic algorithm was developed. 3) A placement optimization technique to minimize the maximum temperature and wiring length on the PCB was developed. For thermal analysis of wearable devices, thermal resistance models of wrist- and glasses-types was developed.
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