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Malware detection scheme using behavioral sequence similarity

Research Project

Project/Area Number 17K00181
Research Category

Grant-in-Aid for Scientific Research (C)

Allocation TypeMulti-year Fund
Section一般
Research Field Information security
Research InstitutionTokyo Institute of Technology

Principal Investigator

Isshiki Tsuyoshi  東京工業大学, 工学院, 教授 (10281718)

Project Period (FY) 2017-04-01 – 2021-03-31
Project Status Completed (Fiscal Year 2020)
Budget Amount *help
¥4,550,000 (Direct Cost: ¥3,500,000、Indirect Cost: ¥1,050,000)
Fiscal Year 2019: ¥1,040,000 (Direct Cost: ¥800,000、Indirect Cost: ¥240,000)
Fiscal Year 2018: ¥1,560,000 (Direct Cost: ¥1,200,000、Indirect Cost: ¥360,000)
Fiscal Year 2017: ¥1,950,000 (Direct Cost: ¥1,500,000、Indirect Cost: ¥450,000)
Keywordsマルウェア対策 / プログラム解析 / プロセッサ設計 / マルウェア検知 / プロセッサエミュレータ
Outline of Final Research Achievements

Behavioral analysis and detection of malwares has mostly been performed by experienced engineers, which is too time consuming for the drastic increase in malware attack incidents nowadays. For automating the analysis and detection of malwares, we have developed a new set of techniques combining emulator-driven program structure analysis scheme, enumeration of malware API call sequences for profiling malware behaviors, and a custom processor for accelerating malware program analysis.

Academic Significance and Societal Importance of the Research Achievements

近年、マルウェア(悪意ソフトウェア)による情報システムの障害が急増しており、重要な情報インフラ・社会インフラへの深刻な攻撃が現在でも大きな社会問題になっている。増大するマルウェア攻撃は近年益々巧妙化してきており、これらの攻撃に迅速に対処するためには、多様なマルウェアの特徴を自動的に解釈し、未然に検知・防御する体系的な仕組みが必須であり、本研究は、この課題解決に対し、有効な技術要素の蓄積を行ったものである。

Report

(5 results)
  • 2020 Annual Research Report   Final Research Report ( PDF )
  • 2019 Research-status Report
  • 2018 Research-status Report
  • 2017 Research-status Report
  • Research Products

    (8 results)

All 2021 2020 2019 2018 2017

All Journal Article (3 results) (of which Peer Reviewed: 3 results,  Open Access: 3 results) Presentation (5 results) (of which Int'l Joint Research: 4 results,  Invited: 4 results)

  • [Journal Article] Scalable Hardware Architecture for fast Gradient Boosted Tree Training2021

    • Author(s)
      T. Sadasue, T. Tanaka, R. Kasahara, A. Darmawan, T. Isshiki
    • Journal Title

      IPSJ Transactions on System LSI Design Methodology

      Volume: 14 Pages: 11-20

    • NAID

      130007987502

    • Related Report
      2020 Annual Research Report
    • Peer Reviewed / Open Access
  • [Journal Article] Design of an Application Specific Instruction Set Processor for Real-Time Object Detection Using AdaBoost Algorithm2017

    • Author(s)
      Shanlin Xiao, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda
    • Journal Title

      IEICE Trans. Fundamentals

      Volume: Vol. E100.A, No.7 Pages: 1384-1395

    • NAID

      130007311796

    • Related Report
      2017 Research-status Report
    • Peer Reviewed / Open Access
  • [Journal Article] HOG-Based Object Detection Processor Design Using ASIP Methodology2017

    • Author(s)
      Shanlin Xiao, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda
    • Journal Title

      IEICE Trans. Fundamentals

      Volume: Vol. E100.A, No.12 Pages: 2972-2984

    • NAID

      130006236477

    • Related Report
      2017 Research-status Report
    • Peer Reviewed / Open Access
  • [Presentation] Scalable Full Hardware Logic Architecture for Gradient Boosted Tree Training2020

    • Author(s)
      T. Sadasue, T. Isshiki
    • Organizer
      IEEE International Symposium on Field Programmable Custom Computing Machines
    • Related Report
      2020 Annual Research Report
    • Int'l Joint Research
  • [Presentation] CNN Training HW Architecture Design Using C2RTL SoC Synthesis/Verification Framework2019

    • Author(s)
      Tsuyoshi Isshiki
    • Organizer
      19th International Forum on MPSoC for Software-defined Hardware (MPSoC '19)
    • Related Report
      2019 Research-status Report
    • Int'l Joint Research / Invited
  • [Presentation] C2RTL SoC Synthesis/Verification Framework For IoT Edge Devices2018

    • Author(s)
      Tsuyoshi Isshiki
    • Organizer
      18th International Forum on MPSoC for Software-defined Hardware (MPSoC '18)
    • Related Report
      2018 Research-status Report
    • Int'l Joint Research / Invited
  • [Presentation] C2RTLフレームワークによるRISC-VベースSoCモデルの論理合成とシステム検証2017

    • Author(s)
      一色剛
    • Organizer
      Design Solution Forum
    • Related Report
      2017 Research-status Report
    • Invited
  • [Presentation] C++ Object-Oriented RTL Modeling for System-Level Synthesis/Verification on the C2RTL Framework2017

    • Author(s)
      Tsuyoshi Isshiki
    • Organizer
      17th International Forum on MPSoC for Software-defined Hardware (MPSoC ’17)
    • Related Report
      2017 Research-status Report
    • Int'l Joint Research / Invited

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Published: 2017-04-28   Modified: 2022-01-27  

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