| Budget Amount *help |
¥47,970,000 (Direct Cost: ¥36,900,000、Indirect Cost: ¥11,070,000)
Fiscal Year 2009: ¥10,400,000 (Direct Cost: ¥8,000,000、Indirect Cost: ¥2,400,000)
Fiscal Year 2008: ¥10,400,000 (Direct Cost: ¥8,000,000、Indirect Cost: ¥2,400,000)
Fiscal Year 2007: ¥14,950,000 (Direct Cost: ¥11,500,000、Indirect Cost: ¥3,450,000)
Fiscal Year 2006: ¥12,220,000 (Direct Cost: ¥9,400,000、Indirect Cost: ¥2,820,000)
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| Research Abstract |
The design technology of ultra-low power VLSI processor to improve the perception recognition ability of the next generation wearable computer has been developed. A SIFT Descriptor Generation Engine which features a VLSI oriented Scale Invariant Feature Transform (SIFT) algorithm was realized and it provides high energy efficiency, 2.79mJ/frame, and processing capability for HDTV resolution video (1920x1080 pixels) at 30 frames per second (fps). Moreover, the development of VLSI architecture for the real-time continuous speech recognition was completed about 20000 vocabularies.
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