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Study on Hardware-Software Collaborative Scheduling for Highly Efficient Multithreading

Research Project

Project/Area Number 18300011
Research Category

Grant-in-Aid for Scientific Research (B)

Allocation TypeSingle-year Grants
Section一般
Research Field Computer system/Network
Research InstitutionTohoku University

Principal Investigator

KOBAYASHI Hiroaki  Tohoku University, サイバ-サイエンスセンタ-, 教授 (40205480)

Co-Investigator(Kenkyū-buntansha) 中村 維男  東北大学, 名誉教授 (80005454)
鈴木 健一  東北大学, 大学院・情報科学研究科, 講師 (50300520)
滝沢 寛之  東北大学, 大学院・情報科学研究科, 講師 (70323996)
江川 隆輔  東北大学, 情報シナジー機構, 助教 (80374990)
佐藤 幸紀  北陸先端科学技術大学院大学, 情報科学センター, 助教 (30452113)
Co-Investigator(Renkei-kenkyūsha) NAKAMURA Tadao  東北大学, 名誉教授 (80005454)
SUZUKI Kenichi  東北工業大学, 情報通信工学科, 准教授 (50300520)
TAKIZAWA Hiroyuki  東北大学, 情報科学研究科, 准教授 (70323996)
EGAWA Ryusuke  東北大学, サイバーサイエンスセンター, 助教 (80374990)
SATO Yukinori  北陸先端科学技術大学院大学, 情報科学センター, 助教 (30452113)
Research Collaborator KOTERA Isao  株式会社, ルネサステクノロジ
FUNAYA Yusuke  東北大学, 大学院情報科学研究科, 博士課程後期
SATO Masayuki  東北大学, 大学院情報科学研究科, 博士課程後期
Project Period (FY) 2006 – 2009
Project Status Completed (Fiscal Year 2008)
Budget Amount *help
¥18,300,000 (Direct Cost: ¥15,300,000、Indirect Cost: ¥3,000,000)
Fiscal Year 2008: ¥6,890,000 (Direct Cost: ¥5,300,000、Indirect Cost: ¥1,590,000)
Fiscal Year 2007: ¥6,110,000 (Direct Cost: ¥4,700,000、Indirect Cost: ¥1,410,000)
Fiscal Year 2006: ¥5,300,000 (Direct Cost: ¥5,300,000)
Keywordsスレッドスケジューリング / マルチコアプロセッサ / 低消費電力機構 / キャッシュ / 消費電力最適化 / キヤッシュ / SMT / CMT / 共有キャッシュ分割 / フェアキャッシュスケジューリング / スレッド特微量 / 省電力プロセッサ設計
Research Abstract

次世代のオンチップマルチコアプロセッサ(CMP)において、オンチップ計算資源の効率的活用による低消費電力高性能処理の実現を目指して、低消費電力指向高効率マルチスレッド処理技術の研究・開発を行った。具体的には、CMP上で実行されるスレッドの特徴量を定義し、この定義に基づくマルチコアプロセッサのための高効率スレッドスケジュ-リング手法を確立すると共に、高性能と低消費電力の両立を実現する動的キャッシュ分割機構を開発し、シミュレ-ションにより、その有効性を明らかにした。

Report

(4 results)
  • 2008 Annual Research Report   Final Research Report ( PDF )
  • 2007 Annual Research Report
  • 2006 Annual Research Report
  • Research Products

    (55 results)

All 2009 2008 2007 2006

All Journal Article (43 results) (of which Peer Reviewed: 36 results) Presentation (12 results)

  • [Journal Article] Run-time detection mechanism of nested call-loop structure to monitor the actual execution of codes2009

    • Author(s)
      Yukinori Sato, Ken-ichi Suzuki and Tadao Nakamura
    • Journal Title

      Proceedings of First International Workshop on Software Technologies for Future Dependable Distributed Systems

      Pages: 184-189

    • Related Report
      2008 Final Research Report
    • Peer Reviewed
  • [Journal Article] A Cache-Aware Thread Scheduling Policy for Multi-Core Processors2009

    • Author(s)
      Masayuki Sato, Isao Kotera, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
    • Journal Title

      Proceedings of the IASTED International Conference on Parallel and Distributed Computing and Networks(PDCN 2009)

      Pages: 109-114

    • Related Report
      2008 Final Research Report
    • Peer Reviewed
  • [Journal Article] A Cache-Aware Thread Scheduling Policy for Multi-Core Processors2009

    • Author(s)
      Masayuki Sato, Isao Kotera, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobavashi
    • Journal Title

      Proceedings of the IASTED International Conference on Parallel and Distributed Computing and Netw orks (PDCN 2009)

      Pages: 109-114

    • Related Report
      2008 Annual Research Report
    • Peer Reviewed
  • [Journal Article] Run-time detection mechanism of nested call-loop structure to monitor the actual execution of codes2009

    • Author(s)
      Yukinori Sato, Ken-ichi Suzuki, and Tadao Nakamura
    • Journal Title

      Proceedings of First International Workshop on Software Technologies for Future Dependable Distributed Systems

      Pages: 184-189

    • Related Report
      2008 Annual Research Report
    • Peer Reviewed
  • [Journal Article] Power-Aware Dynamic Cache Partitioning for CMPs2008

    • Author(s)
      Isao Kotera, Kenta Abe, Ryusuke Egawa, Hiroyuki Takizawa and Hiroaki Kobayashi
    • Journal Title

      Transactions on High-Performance Embedded Architectures and Compilers vol.3, No.1

      Pages: 149-167

    • Related Report
      2008 Final Research Report
    • Peer Reviewed
  • [Journal Article] Modeling of Cache Access Behavior Based on Zipf's Law2008

    • Author(s)
      Isao Kotera, Kenta Abe, Ryusuke Egawa, Hiroyuki Takizawa and Hiroaki Kobayashi
    • Journal Title

      Proceedings of the 9th MEDEA Workshop

      Pages: 9-15

    • Related Report
      2008 Final Research Report
    • Peer Reviewed
  • [Journal Article] ウェイアロケーション型共有キャッシュ機構のハードウェア設計に関する研究2008

    • Author(s)
      阿部健太, 小寺功, 江川隆輔, 滝沢寛之, 小林広明
    • Journal Title

      第7回情報科学技術フォ-ラム(FIT2008)予稿集

      Pages: 35-38

    • Related Report
      2008 Final Research Report
    • Peer Reviewed
  • [Journal Article] ウェイアロケ-ション型共有キャッシュ機構のハ-ドウェア設計に関する研究2008

    • Author(s)
      阿部健太, 小寺功, 江川隆輔, 滝沢寛之, 小林広明
    • Journal Title

      第7回情報科学技術フォーラム(FIT2008)予稿集

      Pages: 35-38

    • Related Report
      2008 Annual Research Report
    • Peer Reviewed
  • [Journal Article] Modeling of Cache Access Behavior Based on Zipfs Law2008

    • Author(s)
      Isao Kotera, Kenta Abe, Ryusuke Egawa, Hiroyuki Takizawa, and Hiroaki Kobavashi
    • Journal Title

      Proceedings of the 9th MEDEA Workshop

      Pages: 9-15

    • Related Report
      2008 Annual Research Report
    • Peer Reviewed
  • [Journal Article] Power-Aware Dynamic Cache Partitioning for CMPs2008

    • Author(s)
      Isao Kotera, Kenta Abe, Ryusuke Egawa, Hiroyuki Takizawa, and Hirnabi Wnhavachi
    • Journal Title

      Transactions on High-Performance Embedded Architectures and Compilers (Transactions on HiPEAC) Vol.3, No.1

      Pages: 149-167

    • Related Report
      2008 Annual Research Report
    • Peer Reviewed
  • [Journal Article] Power-Aware Dynamic Cache Partitioning for CMPs2008

    • Author(s)
      Isao Kotera, Kenta Abe, Ryusuke Egawa, Hiroyuki Takizawa, and Hiroaki Kobayashi
    • Journal Title

      Transactions on High-Performance Embedded Architectures and Compilers (採録決定済み)

    • Related Report
      2007 Annual Research Report
    • Peer Reviewed
  • [Journal Article] クラスタ型データパスによるスーパースカラプロセッサの低消費電力化2007

    • Author(s)
      佐藤幸紀, 鈴木健一, 中村維男
    • Journal Title

      先進的計算基盤システムシンポジウム(SACSIS2007)

      Pages: 451-452

    • NAID

      110006367084

    • Related Report
      2008 Final Research Report
    • Peer Reviewed
  • [Journal Article] クラスタ型データパスによるスーパースカラプロセッサの低消費電力化2007

    • Author(s)
      佐藤幸紀, 鈴木健一, 中村維男
    • Journal Title

      情報処理学会論文誌コンピュ-ティングシステム Vol.48

      Pages: 84-94

    • NAID

      110006367084

    • Related Report
      2008 Final Research Report
    • Peer Reviewed
  • [Journal Article] Gain-based Delay Balancing Technique for Wave Pipelining2007

    • Author(s)
      Jubee Tada, Ryusuke Egawa, Keiichiro Sano, Gensuke Goto and Tadao Nakamura
    • Journal Title

      Proceedings of The 22nd International Technical Conference on Circuits/Systems (ITCISCC 2007)

      Pages: 451-452

    • Related Report
      2008 Final Research Report
    • Peer Reviewed
  • [Journal Article] The Row and Column Cache and its Management Policies2007

    • Author(s)
      Ken-ichi Suzuki, Ryusuke Egawa and Tadao Nakamura
    • Journal Title

      Journal of Information Vol.10

      Pages: 687-694

    • Related Report
      2008 Final Research Report
    • Peer Reviewed
  • [Journal Article] Scaling Effects in Combinational Logic Circuit Design2007

    • Author(s)
      Ryusuke Egawa, Tasuku Ito, Tomoyuki Inoue, Jubee Tada, Ken-ichi Suzuki and Tadao Nakamura
    • Journal Title

      Journal of Information Vol.10

      Pages: 695-702

    • Related Report
      2008 Final Research Report
    • Peer Reviewed
  • [Journal Article] SMTプロセッサの実行時性能予測のためのハ-ドウェアリソース競合解析2007

    • Author(s)
      佐藤雅之, 船矢祐介, 小寺功, 滝沢寛之, 小林広明
    • Journal Title

      情報科学技術フォーラム(FIT2007)情報技術レターズ Vol.6

      Pages: 67-70

    • Related Report
      2008 Final Research Report
    • Peer Reviewed
  • [Journal Article] 消費電力を考慮したウェイアロケーション型共有キャッシュ機構2007

    • Author(s)
      小寺功, 滝沢寛之, 小林広明
    • Journal Title

      情報科学技術フォーラム(FIT2007)情報技術レターズ Vol.6

      Pages: 55-58

    • Related Report
      2008 Final Research Report
    • Peer Reviewed
  • [Journal Article] An On-Chip Cache Design for Vector Processors2007

    • Author(s)
      Akihiro Musa, Yoshiei Sato, Ryusuke Egawa, Hiroyuki Takizawa, Koki Okabe and Hiroaki Kobayashi
    • Journal Title

      Proceedings of the 8th MEDEA workshop

      Pages: 17-23

    • Related Report
      2008 Final Research Report
    • Peer Reviewed
  • [Journal Article] A Power-Aware Shared Cache Mechanism on Locality Assessment of Memory Reference for CMPs2007

    • Author(s)
      Isao Kotera, Ryusuke Egawa, Hiroyuki Takizawa and Hiroaki Kobayashi
    • Journal Title

      Proceedings of the 8th MEDEA workshop

      Pages: 121-128

    • Related Report
      2008 Final Research Report
    • Peer Reviewed
  • [Journal Article] Power Estimation of Partitioned Register Files in a Cluster Architecture with Performance Evaluation2007

    • Author(s)
      Yukinori Sato, Ken-ichi Suzuki and Tadao Nakamura
    • Journal Title

      IEICE Transactions on Information and Systems Vol.E90-D

      Pages: 627-636

    • NAID

      110007519512

    • Related Report
      2008 Final Research Report
    • Peer Reviewed
  • [Journal Article] A Power Aware Shared Cache Mechanism on Locality Assessment of Memory Reference for CMPs2007

    • Author(s)
      Isao Kotera, Ryusuke Egawa, Hiroyuki Takizawa, and Hiroaki Kobayashi
    • Journal Title

      Proceedings of the 8th MEDEA workshop

      Pages: 121-128

    • Related Report
      2007 Annual Research Report
    • Peer Reviewed
  • [Journal Article] An On-Chip Cache Design for Vector Processors2007

    • Author(s)
      Akihiro Musa, Yoshiei Sato, Ryusuke Egawa, Hiroyuki Takizawa, Koki Okabe, and Hiroaki Kobayashi
    • Journal Title

      Proceedings of the 8th MEDEA workshop

      Pages: 17-23

    • Related Report
      2007 Annual Research Report
    • Peer Reviewed
  • [Journal Article] 消費電力を考慮したウェイアロケーション型共有キャッシュ機構2007

    • Author(s)
      小寺功, 滝沢寛之, 小林広明
    • Journal Title

      情報科学技術フォーラム(FIT2007)情報技術レターズ 6

      Pages: 55-58

    • Related Report
      2007 Annual Research Report
    • Peer Reviewed
  • [Journal Article] SMTプロセッサの実行時性能予測のためのハードウェアリソース競合解析2007

    • Author(s)
      佐藤雅之, 船矢祐介, 小寺功, 滝沢寛之, 小林広明
    • Journal Title

      情報科学技術フォーラム(FIT2007)情報技術レターズ 6

      Pages: 67-70

    • Related Report
      2007 Annual Research Report
    • Peer Reviewed
  • [Journal Article] Scaling Effects in Combinational Logic Circuit Design2007

    • Author(s)
      Ryusuke Egawa, Tasku Ito, Tomoyuki Inoue, Jubei Tada, Ken-ichi Suzuki and Tadao Nakamura
    • Journal Title

      Journal of Information 10

      Pages: 695-702

    • Related Report
      2007 Annual Research Report
    • Peer Reviewed
  • [Journal Article] The Row and Column Cache and its Management Policies2007

    • Author(s)
      Ken-ichi Suzuki, Ryusuke Egawa and Tadao Nakamura
    • Journal Title

      Journal of Information 10

      Pages: 687-694

    • Related Report
      2007 Annual Research Report
    • Peer Reviewed
  • [Journal Article] Gain-based Delay Balancing Technique for Wave Pipelining2007

    • Author(s)
      Jubee Tada, Ryusuke Egawa, Keiichiro Sano, Gensuke Goto, and Tadao Nakamura
    • Journal Title

      Proceedings of The 22nd International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2007)

      Pages: 451-452

    • Related Report
      2007 Annual Research Report
    • Peer Reviewed
  • [Journal Article] クラスタ型データパスによるスーパースカラ プロセッサの低消費電力化2007

    • Author(s)
      佐藤幸紀, 鈴木健一, 中村維男
    • Journal Title

      情報処理学会論文誌コンピューティングシステム 48

      Pages: 84-94

    • NAID

      110006367084

    • Related Report
      2007 Annual Research Report
    • Peer Reviewed
  • [Journal Article] クラスタ型データパスによるスーパースカラ プロセッサの低消費電力化2007

    • Author(s)
      佐藤幸紀, 鈴木健一, 中村維男
    • Journal Title

      先進的計算基盤システムシンポジウム(SACSIS2007)

      Pages: 255-264

    • NAID

      110006367084

    • Related Report
      2007 Annual Research Report
    • Peer Reviewed
  • [Journal Article] Power Estimation of Partitioned Register Files in a Cluster Architecture with Performance Evaluation2007

    • Author(s)
      Yukinori Sato, Ken-ichi Suzuki, Tadao Nakamura
    • Journal Title

      IEICE Transactions on Information and Systems Vol.E90-D, No.3

      Pages: 627-636

    • NAID

      110007519512

    • Related Report
      2006 Annual Research Report
  • [Journal Article] Future Design Strategy of Combinational Logic Circuits2006

    • Author(s)
      Ryusuke Egawa, Tasuku Ito, Tomoyuki Inoue, Jubee Tada, Ken-ichi Suzuki and Tadao Nakamura
    • Journal Title

      Proceedings of The Fourth International Conference on Information, the Fourth Irish Conference on the Mathematical Foundations of Computer Science and Information Technology'06(Information MFCSIT'06)

      Pages: 110-113

    • Related Report
      2008 Final Research Report
    • Peer Reviewed
  • [Journal Article] A Sophisticated Multiplier in Advanced CMOS Technologies2006

    • Author(s)
      Ryusuke Egawa, Jubee Tada, Gensuke Goto and Tadao Nakamura
    • Journal Title

      Proceedings of International Technical Conference on Circuits/Systems, Computers and Communications(ITC-CSCC2006) Vol.2

      Pages: 53-56

    • Related Report
      2008 Final Research Report
    • Peer Reviewed
  • [Journal Article] Power and Performance Advantages of the Highly Clustered Microarchitecture2006

    • Author(s)
      Yukinori Sato, Ken-ichi Suzuki and Tadao Nakamura
    • Journal Title

      Proceedings of International Workshop on Advanced Low Power Systems Vol.2

      Pages: 53-56

    • Related Report
      2008 Final Research Report
    • Peer Reviewed
  • [Journal Article] Implication of Memory Performance in HEC Systems2006

    • Author(s)
      Hiroaki Kobayashi
    • Journal Title

      High Performance Computing on Vector Systems(Springer-Verlag)

      Pages: 21-50

    • Related Report
      2008 Final Research Report
    • Peer Reviewed
  • [Journal Article] Implications of Memory Performance for Highly Efficient Supercomputing of Scientific Applications2006

    • Author(s)
      Akihiko Musa, Hiroyuki Takizawa, Koki Okabe, Takashi Soga and Hiroaki Kobayashi
    • Journal Title

      Proceedings of International Symposium on Parallel and Distributed Processing and Application (ISPA06)

      Pages: 845-858

    • Related Report
      2008 Final Research Report
    • Peer Reviewed
  • [Journal Article] スレッド特徴量に基づくマルチコアプロセッサスケジューリング2006

    • Author(s)
      船矢祐介, 小寺功,滝沢寛之, 小林広明
    • Journal Title

      情報科学技術レターズ vol.5, no.5

      Pages: 37-40

    • Related Report
      2008 Final Research Report
    • Peer Reviewed
  • [Journal Article] スレッド特徴量に基づくマルチコアプロセッサスケジューリング2006

    • Author(s)
      船矢祐介, 小寺功, 滝沢寛之, 小林広明
    • Journal Title

      情報科学技術レターズ Vo1.5, No.5

      Pages: 37-40

    • Related Report
      2006 Annual Research Report
  • [Journal Article] Implications of Memory Performance for Highly Efficient Supercomputing of Scientific Applications2006

    • Author(s)
      Akihiko Musa, Hiroyuki Takizawa, Koki Okabe, Takashi Soga, Hiroaki Kobayashi
    • Journal Title

      Proceedings of International Symposium on Parallel and Distributed Processing and Application (ISPA06)

      Pages: 845-858

    • Related Report
      2006 Annual Research Report
  • [Journal Article] Implication of Memory Performance in HEC Systems2006

    • Author(s)
      Hiroaki Kobayashi
    • Journal Title

      High Performance Computing on Vector Systems (Springer-Verlag)

      Pages: 21-50

    • Related Report
      2006 Annual Research Report
  • [Journal Article] Power and Performance Advantages of the Highly Clustered Microarchitecture2006

    • Author(s)
      Yukinori Sato, Ken-ichi Suzuki, Tadao Nakamura
    • Journal Title

      Proceedings of International Workshop on Advanced Low Power Systems

      Pages: 55-62

    • Related Report
      2006 Annual Research Report
  • [Journal Article] A Sophisticated Multiplier in Advanced CMOS Technologies2006

    • Author(s)
      Ryusuke Egawa, Jubei Tada, Gensuke Goto, Tadao Nakamuara
    • Journal Title

      Proceedings of International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC2006) Volume II

      Pages: 53-56

    • Related Report
      2006 Annual Research Report
  • [Journal Article] Future Design Strategy of Combinational Logic Circuits2006

    • Author(s)
      Ryusuke Egawa, Tasku Ito, Tomoyuki Inoue, Jubei Tada, Ken-ichi Suzuki, Tadao Nakamura
    • Journal Title

      Proceedings of The Fourth International Conference on Information, the Fourth Irish Conference on the Mathematical Foundations of Computer Science and Information Technology' 06 (Information-MFCSIT'06)

      Pages: 110-113

    • Related Report
      2006 Annual Research Report
  • [Presentation] Run-time data dependence analysis using detected loop regions in binary codes2009

    • Author(s)
      Yukinori Sato and Tadao Nakamura
    • Organizer
      2009 Workshop on Infrastructures for Software/Hardware co-design(WISH)
    • Place of Presentation
      アメリカ・ワシントン州・シアトル
    • Year and Date
      2009-03-22
    • Related Report
      2008 Final Research Report
  • [Presentation] Run-time data dependence analysis using detected loop regions in binar y codes2009

    • Author(s)
      Yukinori Sato and Tadao Nakam ura
    • Organizer
      2009 Workshop on Infrastructures for Software/Hardware co-design(WISH)
    • Place of Presentation
      アメリカ・ワシントン州・シアトル
    • Year and Date
      2009-03-22
    • Related Report
      2008 Annual Research Report
  • [Presentation] クラスタ化プロセッサの静的命令スケジューリングに関する研究2009

    • Author(s)
      鈴木健一
    • Organizer
      電子情報通信学会東北支部先端技術シンポジウム
    • Place of Presentation
      仙台
    • Year and Date
      2009-03-16
    • Related Report
      2008 Annual Research Report 2008 Final Research Report
  • [Presentation] ループ構造に着目したマルチグレイン・マルチレイヤ並列処理システムの提案2008

    • Author(s)
      佐藤幸紀
    • Organizer
      第172回計算機アーキテクチャ研究発表会
    • Place of Presentation
      福岡県筑紫野市
    • Year and Date
      2008-10-20
    • Related Report
      2008 Annual Research Report 2008 Final Research Report
  • [Presentation] ル-プ並列化のためのループ階層構造を検出する実行時プロファイリング手法2008

    • Author(s)
      佐藤幸紀, 鈴木健一, 中村維男
    • Organizer
      第117回ハイパフォ-マンスコンピュ-ティング研究発表会
    • Place of Presentation
      東京
    • Year and Date
      2008-10-15
    • Related Report
      2008 Final Research Report
  • [Presentation] ループ並列化のためのループ階層構造を検出する実行時プロファイリング手法2008

    • Author(s)
      佐藤幸紀, 鈴木健一, 中村維男
    • Organizer
      第117回ハイパフォーマンスコンピューティング研究発表会
    • Place of Presentation
      東京
    • Year and Date
      2008-10-15
    • Related Report
      2008 Annual Research Report
  • [Presentation] ベクトルプロセッサ用キャッシュメモリの性能評価2008

    • Author(s)
      佐藤義永, 撫佐昭裕, 江川隆輔, 滝沢寛之, 岡部公起, 小林広明
    • Organizer
      ハイパフォーマンスコンピューティングと計算科学シンポジウム(HPCS2008)
    • Place of Presentation
      東京
    • Year and Date
      2008-01-17
    • Related Report
      2008 Final Research Report 2007 Annual Research Report
  • [Presentation] Early Evaluation of On-chip Vector Caching for the NEC SX Vector Architecture2007

    • Author(s)
      Akihiro Musa, Yoshiei Sato, Ryusuke Egawa, Hiroyuki Takizawa, Koki Okabe and Hiroaki Kobayashi
    • Organizer
      Supercomputing
    • Place of Presentation
      米国リノ
    • Year and Date
      2007-11-13
    • Related Report
      2008 Final Research Report
  • [Presentation] Early Evaluation of On-chip Vector Caching for the NEC SX Vector Architecture2007

    • Author(s)
      Akihiro Musa, Yoshiei Sato, Ryusuke Egawa, Hiroyuki Takizawa, Koki Okabe, and Hiroaki Kobayashi
    • Organizer
      Supercomputing'07
    • Place of Presentation
      米国リノ
    • Year and Date
      2007-11-13
    • Related Report
      2007 Annual Research Report
  • [Presentation] ウェイアロケ-ション型共有キャッシュ機構の性能評価2007

    • Author(s)
      小寺功, 江川隆輔, 滝沢寛之, 小林広明
    • Organizer
      並列/協調/分散処理に関するサマーワークショップ(SWoPP2007)
    • Place of Presentation
      旭川
    • Year and Date
      2007-08-01
    • Related Report
      2008 Final Research Report
  • [Presentation] ウェイアロケーション型共有キャッシュ機構の性能評価2007

    • Author(s)
      小寺功, 江川隆輔, 滝沢寛之, 小林広明
    • Organizer
      並列/協調/分散処理に関するサマーワークショップ(SWoPP2007)
    • Place of Presentation
      旭川
    • Year and Date
      2007-08-01
    • Related Report
      2007 Annual Research Report
  • [Presentation] A Fair-Sharing and Power-Aware L2 Cache System for Chip Multiprocessors2007

    • Author(s)
      Isao Kotera, Hiroyuki Takizawa and Hiroaki Kobayashi
    • Organizer
      COOL Chips X
    • Place of Presentation
      横浜
    • Year and Date
      2007-04-19
    • Related Report
      2008 Final Research Report 2007 Annual Research Report

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Published: 2006-04-01   Modified: 2016-04-21  

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