| Project/Area Number |
18310097
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| Research Category |
Grant-in-Aid for Scientific Research (B)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
Microdevices/Nanodevices
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| Research Institution | Tokyo Institute of Technology |
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Principal Investigator |
MIZUTA Hiroshi Tokyo Institute of Technology, Graduate School of Engineering, Visiting Professor (90372458)
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| Co-Investigator(Kenkyū-buntansha) |
ODA Shunri Tokyo Institute of Technology, Quantum Nanoelectronics Research Center, Professor (50126314)
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| Project Period (FY) |
2006 – 2007
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| Project Status |
Completed (Fiscal Year 2007)
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| Budget Amount *help |
¥17,810,000 (Direct Cost: ¥15,500,000、Indirect Cost: ¥2,310,000)
Fiscal Year 2007: ¥10,010,000 (Direct Cost: ¥7,700,000、Indirect Cost: ¥2,310,000)
Fiscal Year 2006: ¥7,800,000 (Direct Cost: ¥7,800,000)
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| Keywords | NEMS / suspended gate / nanoscale MOSFET / single-electron transisto / silicon nanobridge / hybrid simulation / 3D FEM simulation / equivalent circuit model |
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| Research Abstract |
Co-integration of silicon-based nanoelectromechanical systems (NEMSs) and single-electron transistors (SETs) was investigated for developing novel functional nanodevcies beyond the conventional MOSFETs and SETs. Hybrid NEMS-MOS-SET simulation technology was first developed by combining three-dimensional mechanical, electrostatic and transport simulation. Based on the numerical results, novel SET-NEMS analytical models were developed and integrated into conventional SPICE circuit simulator. By using these simulation technologies, two device concepts were explored : one which features a mechanically movable gate integrated into SETs (SET-NEMS) and another in which the SET channel itself works as NEMS (NEMSET). For the former structure, we fabricated suspended-gate structures on the silicon-on-insulator (SOD substrates and demonstrated that a rapid 'pull-in' motion of the suspended-gate enables to switch the period of Coulomb oscillation and this may be utilized for signal encoding in the periodicity realizing the offset charge independent SET logic. For the latter structure, we successfully fabricated silicon nanobridge transistors with a suspended quantum dot and demonstrated clear Coulomb blockade characteristics superior to the conventional SETs. In addition, we observed at temperatures<4.2K that Coulomb current peaks disappear for a finite range of source-to-drain voltage, which is attributable to a new type of blockade of single-electron tunneling caused by cavity phonons confined in the suspended quantum dot.
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