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Design of highly reliable circuit considering crosstalk noise

Research Project

Project/Area Number 18500040
Research Category

Grant-in-Aid for Scientific Research (C)

Allocation TypeSingle-year Grants
Section一般
Research Field Computer system/Network
Research InstitutionTokyo Metropolitan University

Principal Investigator

MIURA Yukiya  Tokyo Metropolitan University, Graduate School of System Design, Associate Professor (00254152)

Project Period (FY) 2006 – 2007
Project Status Completed (Fiscal Year 2007)
Budget Amount *help
¥1,350,000 (Direct Cost: ¥1,200,000、Indirect Cost: ¥150,000)
Fiscal Year 2007: ¥650,000 (Direct Cost: ¥500,000、Indirect Cost: ¥150,000)
Fiscal Year 2006: ¥700,000 (Direct Cost: ¥700,000)
KeywordsCrosstalk / Dependable design / Synchronous circuits / Edge trigger clock / Level sensitive clock / Self-correction / Periodic signal
Research Abstract

In order to guarantee proper function of a system,a correct clock signal must be distributed. A crosstalk noise induced by a parasitic capacitance between signal lines gives a large influence to a digital circuit. This influence is called a crosstalk fault. Moreover,since synchronous digital circuits are the dominant technology in the present day,it is possible to cause incorrect behavior in many parts in the circuit when the crosstalk noise is generated on the clock signal line. It is difficult to eliminate perfect causes of crosstalk noises. Moreover,crosstalk noises are not always detected as faults,because their influence may cause behavior of intermittent faults and crosstalk noises happen accidentally by unintended causes. In this work,we proposed two methods for distributing the clock signal that take account of crosstalk noises generated on the clock signal line,which are applicable to conventional synchronous digital systems. For the clock signal of a pulse type,we proposed a double/multiple clock pulse method that has the tolerance for an incorrect clock pulse induced by a crosstalk fault. For the clock signal of a level sensitive type,we proposed a self-correction method for the change of the clock signal width during system operation. The proposed method does not require a reference signal for signal correction. The circuits implemented by both methods can be inserted into clock signal.lines as adapter circuits for the conventional clocked element and flip-flop,and as a result,the proposed methods are easily built in conventional synchronous digital circuits. From simulation results,we find that implemented circuits had the ability of the tolerance for the process variations. Two proposed methods are applicable to not only LSIs but also every synchronous circuit including board circuits. Besides,they are useful for circuits demanding high reliability.

Report

(3 results)
  • 2007 Annual Research Report   Final Research Report Summary
  • 2006 Annual Research Report
  • Research Products

    (20 results)

All 2008 2007 2006

All Journal Article (14 results) (of which Peer Reviewed: 6 results) Presentation (4 results) Patent(Industrial Property Rights) (2 results)

  • [Journal Article] A self-correction method for change of clock signal width2007

    • Author(s)
      Yukiya Miura
    • Journal Title

      Proceedings of IEEE European Test Symposium 11

      Pages: 47-51

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
    • Peer Reviewed
  • [Journal Article] Dependable clock design for level sensitive clock signal2007

    • Author(s)
      Yukiya Miura
    • Journal Title

      Information Technology Letters LC-012

      Pages: 75-78

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Annual Research Report 2007 Final Research Report Summary
    • Peer Reviewed
  • [Journal Article] Dependable clock distribution for crosstalk aware design2007

    • Author(s)
      Yukiya Miura
    • Journal Title

      Proceedings of International Test Conference 38

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Annual Research Report 2007 Final Research Report Summary
    • Peer Reviewed
  • [Journal Article] A self-correction method for change of cock signal width2007

    • Author(s)
      Yukiya, Miura
    • Journal Title

      Proceedings of IEEE European Test Symposium vol. 11

      Pages: 47-51

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Journal Article] Dependable clock design for level sensitive clock signal2007

    • Author(s)
      Yukiya, Miura
    • Journal Title

      Information Technology Letters vol. LC-012

      Pages: 75-78

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Journal Article] Dependable clock distribution for crosstalk aware design2007

    • Author(s)
      Yukiya, Miura
    • Journal Title

      Proceedings of International Test Conference vol. 38

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Journal Article] A self-correction method for change of cock signal width2007

    • Author(s)
      Yukiya Miura
    • Journal Title

      Proceedings of IEEE European Test Symposium 11

      Pages: 47-51

    • Related Report
      2007 Annual Research Report
    • Peer Reviewed
  • [Journal Article] 2重クロックパルス法の実現とばらつき耐性の評価2007

    • Author(s)
      三浦 幸也
    • Journal Title

      電子情報通信学会ディペンダブルコンピューティング研究会 DC2006-89

      Pages: 55-60

    • NAID

      110006224508

    • Related Report
      2006 Annual Research Report
  • [Journal Article] Proposal of a clock signal generation/detection method for crosstalk aware design2006

    • Author(s)
      Yukiya Miura
    • Journal Title

      Proceedings of IEEE European Test Symposium 10

      Pages: 19-23

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
    • Peer Reviewed
  • [Journal Article] Proposal of dependable clock signal distribution2006

    • Author(s)
      Yukiya Miura
    • Journal Title

      Information Technology Letters LC-007

      Pages: 41-44

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
    • Peer Reviewed
  • [Journal Article] Proposal of a Clock Signal Generation/Detection Method for Crosstalk Aware Design2006

    • Author(s)
      Yukiya, Miura
    • Journal Title

      Proceedings of IEEE European Test Symposium vol. 10

      Pages: 19-23

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Journal Article] Proposal of Dependable Clock Signal Distribution2006

    • Author(s)
      Yukiya, Miura
    • Journal Title

      Information Technology Letters vol. LC-007

      Pages: 41-44

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Journal Article] Proposal of a Clock Signal Generation/Detection Method for Crosstalk Aware Design2006

    • Author(s)
      Yukiya Miura
    • Journal Title

      Proceedings of 2006 IEEE European Test Symposium

      Pages: 19-23

    • Related Report
      2006 Annual Research Report
  • [Journal Article] Proposal of Dependable Clock Signal Distribution2006

    • Author(s)
      Yukiya Miura
    • Journal Title

      Information Technology Letters, Forum on Information Technology 2006 LC-007

      Pages: 41-44

    • Related Report
      2006 Annual Research Report
  • [Presentation] 周期信号の自己訂正法2008

    • Author(s)
      三浦 幸也
    • Organizer
      電子情報通信学会ディペンダブルコンピューティング研究会
    • Place of Presentation
      東京
    • Year and Date
      2008-02-08
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Annual Research Report 2007 Final Research Report Summary
  • [Presentation] A Self-Correction Method for Periodic Signals2008

    • Author(s)
      Yukiya, Miura
    • Organizer
      IEICE Technical Report
    • Place of Presentation
      Tokyo
    • Year and Date
      2008-02-08
    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] 2重クロックパルス法の実現とばらつき耐性の評価2007

    • Author(s)
      三浦 幸也
    • Organizer
      電子情報通信学会ディペンダブルコンピューティング研究会
    • Place of Presentation
      東京
    • Year and Date
      2007-02-09
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Implementation of a Double Clock Pulse Method and Evaluation of Tolerance for Process Variations2007

    • Author(s)
      Yukiya, Miura
    • Organizer
      IEICE Technical Report
    • Place of Presentation
      Tokyo
    • Year and Date
      2007-02-09
    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Patent(Industrial Property Rights)] 周期信号訂正回路2007

    • Inventor(s)
      三浦 幸也
    • Industrial Property Rights Holder
      三浦 幸也
    • Filing Date
      2007-05-15
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Patent(Industrial Property Rights)] 周期信号訂正回路2007

    • Inventor(s)
      三浦幸也
    • Industrial Property Rights Holder
      三浦幸也
    • Industrial Property Number
      2007-129786
    • Filing Date
      2007-05-15
    • Related Report
      2007 Annual Research Report

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Published: 2006-04-01   Modified: 2016-04-21  

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