| Budget Amount *help |
¥44,590,000 (Direct Cost: ¥34,300,000、Indirect Cost: ¥10,290,000)
Fiscal Year 2020: ¥11,700,000 (Direct Cost: ¥9,000,000、Indirect Cost: ¥2,700,000)
Fiscal Year 2019: ¥14,950,000 (Direct Cost: ¥11,500,000、Indirect Cost: ¥3,450,000)
Fiscal Year 2018: ¥17,940,000 (Direct Cost: ¥13,800,000、Indirect Cost: ¥4,140,000)
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| Outline of Final Research Achievements |
The problem with SiC power MOSFETs is that the guideline for performance improvement remains unclear because the limiting factors for channel characteristics are not yet clarified. In this study, we discovered a few previously unknown phenomena that occur at the SiO2/SiC interface during the formation of SiO2, the gate insulator, and elucidated the mechanisms of those phenomena. Examples of those phenomena are: anomalous distortion in SiC during the interface formation, and the change of band alignment between SiC and SiO2 caused by the introduction of nitrogen for the suppression of interface defects. The banefit of H2O vapor annealing of the interface was also clarified based on the evaluation of defect levels distributed inside of the SiO2 film. Based on these findings, we newly provided some guidelines for device process design.
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