Archtecture of plasmonic logic circuit

• Project/Area Number: 18K04282
• Research Category: Grant-in-Aid for Scientific Research (C)
• Allocation Type: Multi-year Fund
• Section: 一般
• Review Section: Basic Section 21060:Electron device and electronic equipment-related
• Research Institution: Toyohashi University of Technology
• Principal Investigator: Fukuda Mitsuo 豊橋技術科学大学, 工学(系)研究科(研究院), シニア研究員 (50378262)
• Co-Investigator(Kenkyū-buntansha): 石川 靖彦 豊橋技術科学大学, 工学(系)研究科(研究院), 教授 (60303541)
• Project Period (FY): 2018-04-01 – 2021-03-31
• Project Status: Completed (Fiscal Year 2020)
• Budget Amount: ¥4,290,000 (Direct Cost: ¥3,300,000、Indirect Cost: ¥990,000); Fiscal Year 2020: ¥650,000 (Direct Cost: ¥500,000、Indirect Cost: ¥150,000); Fiscal Year 2019: ¥1,040,000 (Direct Cost: ¥800,000、Indirect Cost: ¥240,000); Fiscal Year 2018: ¥2,600,000 (Direct Cost: ¥2,000,000、Indirect Cost: ¥600,000)
• Keywords: 表面プラズモン / 論理演算回路 / 光集積回路 / プラズモニック導波路

Outline of Final Research Achievements

A cascadable full-adder operating with surface plasmons (compressional waves of electrons propagating on metal surface at velocity of light) was developed, and its performances were analytically and experimentally confirmed. For the plasmonic circuit design and operation analysis, design techniques were developed employing electromagnetic field analysis method (finite difference time domain method). For the plasmonic circuit fabrication, fabrication techniques were developed using a CMOS-transistor manufacturing line set in the inside campus. For evaluating the plasmonic circuits, a setup was developed by modifying a conventional scanning near-field optical microscope. As results of these technical developments, the operation as a cascadable full-adder was confirmed for the developed plasmonic circuit.

Academic Significance and Societal Importance of the Research Achievements

本研究の成果は光と電子が融合して高密度実装されたフォトニック集積回路の開発へ発展させることができる。さらに、表面プラズモンは光の速度で金属配線上を伝播するため、現在のシリコン集積回路等が抱えている信号遅延や消費電力などの問題を解決できる可能性がある。その結果、高度情報通信社会の高度化に向けた高速・大容量処理が可能なキーデバイスの創出に結び付く可能性がある。

Research Products

• [Journal Article] Feasibility of Plasmonic Circuits in Nanophotonics (2020)
  • Author(s): M. Fukuda, S. Okahisa, Y. Tonooka, M. Ota, T. Aihara, Y. Ishikawa
  • Journal Title: IEEE ACCESS Volume: 8 Pages: 142495-142506
  • DOI: 10.1109/access.2020.3013605
  • Peer Reviewed / Open Access
• [Journal Article] Feasibility of plasmonic circuits for on-chip interconnects (2019)
  • Author(s): M. Fukuda, Y. Tonooka, T. Inoue, M. Ota
  • Journal Title: Solid State Electronics Volume: 156 Pages: 33-40
  • Peer Reviewed / Open Access
• [Journal Article] Feasibility of Cascadable Plasmonic Full Adder (2019)
  • Author(s): M. Fukuda, R. Watanabe, Y. Tonooka, and M. Ota
  • Journal Title: IEEE Photonics Journal Volume: 11 Issue: 4 Pages: 4801612-4801612
  • DOI: 10.1109/jphot.2019.2932262
  • Peer Reviewed / Open Access
• [Journal Article] Plasmonic slow light device using superfocusing on a bow-tied metallic waveguide (2018)
  • Author(s): Furuki Takahiro、Ota Masashi、Fukuda Mitsuo
  • Journal Title: Optics Letters Volume: 43 Issue: 14 Pages: 3232-3235
  • DOI: 10.1364/ol.43.003232
  • Peer Reviewed / Open Access
• [Journal Article] Highly efficient on-chip excitation of orthogonal-polarized gap plasmons for a dense polarization multiplexing circuit (2018)
  • Author(s): M. Ota、M. Fukuda
  • Journal Title: Optics Express Volume: 26 Issue: 17 Pages: 21778-21783
  • DOI: 10.1364/oe.26.021778
  • Peer Reviewed / Open Access
• [Presentation] Simulation and Evaluation of Plasmonic Circuits (2020)
  • Author(s): M. Fukuda and Y. Ishikawa
  • Organizer: IEEE Inter. Conf. on Simulation of Semiconductor Processes and Devices (SISPAD)
  • Int'l Joint Research
• [Presentation] Feasibility of plasmonic circuits merged with silicon integrated circuits (2020)
  • Author(s): Mitsuo Fukuda, Yuta Tonooka, Yasuhiko Ishikawa
  • Organizer: 25th Annual SMTA Pan Pacific Microelectronics Symposium
  • Int'l Joint Research
• [Presentation] Fabrication of plasmonic circuits comprising waveguides, multiplexer, demultiplexer, and detector-integrated MOSFETs (2019)
  • Author(s): M. Fukuda, Y. Tonooka, T. Hirano, M. Ota, Y. Ishikawa
  • Organizer: 45th International Conference on Micro & Nano Engineering
  • Int'l Joint Research
• [Presentation] Configuration of nano- and micro-scale plasmonic circuits fabricated by CMOS-compatible processes (2018)
  • Author(s): M. Fukuda, M. Ota, K. Nakayama, S. Higuchi, T. Furuki, R. Watanabe, Y. Kikuchi, Y. Tonooka, T. Hirano, T. Inoue, and Yuya Ishii
  • Organizer: EMRS 2018 Spring Meeting
  • Int'l Joint Research
• [Presentation] Highly efficient on-chip excitation of orthogonal-polarized gap plasmons (2018)
  • Author(s): Masashi Ota, Tomohiro Hirano, Yuta Tonooka, Yudai Kikuchi, and Mitsuo Fukuda
  • Organizer: EMRS 2018 Fall Meeting
  • Int'l Joint Research
• [Presentation] Low loss waveguide structure as plasmonic wiring for integrated circuits and its characteristics (2018)
  • Author(s): Yuta Tonooka, Masashi Ota, Yudai Kikuchi, Tomohiro Hirano, and Mitsuo Fukuda
  • Organizer: EMRS 2018 Fall Meeting
  • Int'l Joint Research
• [Presentation] Plasmonic mode converter consisting of tapered multimode interferometer (2018)
  • Author(s): Tomohiro Hirano, Masashi Ota, Yuta Tonooka, Yudai Kikuchi, and Mitsuo Fukuda
  • Organizer: EMRS 2018 Fall Meeting
  • Int'l Joint Research
• [Presentation] Transmission Loss Characteristics of Plasmonic Waveguides Comprising Various Metals (2018)
  • Author(s): Mitsuo Fukuda, Yuta Tonooka, Masashi Ota, and Yasuhiko Ishikawa
  • Organizer: ANEM 2018
  • Int'l Joint Research
• [Remarks] Photonics Laboratory
  • URL: http://www.photon.ee.tut.ac.jp/