| Project/Area Number |
18K13665
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| Research Category |
Grant-in-Aid for Early-Career Scientists
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| Allocation Type | Multi-year Fund |
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| Review Section |
Basic Section 18010:Mechanics of materials and materials-related
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| Research Institution | National Institute of Advanced Industrial Science and Technology |
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Principal Investigator |
Wang Qinghua 国立研究開発法人産業技術総合研究所, 計量標準総合センター, 主任研究員 (20726856)
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| Project Period (FY) |
2018-04-01 – 2020-03-31
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| Project Status |
Completed (Fiscal Year 2019)
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| Budget Amount *help |
¥4,160,000 (Direct Cost: ¥3,200,000、Indirect Cost: ¥960,000)
Fiscal Year 2019: ¥1,300,000 (Direct Cost: ¥1,000,000、Indirect Cost: ¥300,000)
Fiscal Year 2018: ¥2,860,000 (Direct Cost: ¥2,200,000、Indirect Cost: ¥660,000)
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| Keywords | ひずみ計測 / 変形分布 / 光学技術 / モアレ法 / 画像処理 / 結晶欠陥 / 残留応力 / 微小ひずみ / 残留ひずみ / 熱変形 / 半導体 / 全視野計測 / 位相解析 / 非破壊評価 / 熱変形分布 / 半導体評価 / 非破壊測定 |
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| Outline of Final Research Achievements |
In this study, an optical image processing technique using a grid was developed to measure the strain and residual strain distributions of semiconductor devices in the micro and nano regions. A wide-field and high accuracy measurement method for two-dimensional micro strain and residual thermal strain distributions was developed by integrating the moire method and the inverse problem. Besides, a strain measurement method that is not easily affected by flaws was also proposed. The residual thermal strain distributions of underfill in flip chips were measured by the developed methods. Furthermore, an automatic detection method of crystal defects including interfacial dislocations, and a strain imaging method of atomic arrays arranged in arbitrary directions were developed. Defect detection and strain measurement of atomic arrays in Ge/Si and GaN crystal structures were performed.
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| Academic Significance and Societal Importance of the Research Achievements |
スマートフォンとパソコンなどの製品に広く使われている半導体デバイスの劣化や欠陥を評価するためには、材料内部のひずみと残留ひずみ分布測定手法の開発が喫緊の課題である。本研究で開発した光学画像処理技術によって、ひずみ・残留ひずみ分布計測および原子欠陥検出を行われることができるため、微小領域での応力集中係数と残留応力の定量評価を低コストかつ非破壊で実現可能になる。本研究で得られた成果は、半導体デバイスの壊れにくい材料設計指針および欠陥発生率の少ないプロセスの確立へ貢献できると考えられる。
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