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Research on the next-generation IP+Optical network based on high-speed path search by parallel processing

Research Project

Project/Area Number 19360178
Research Category

Grant-in-Aid for Scientific Research (B)

Allocation TypeSingle-year Grants
Section一般
Research Field Communication/Network engineering
Research InstitutionKeio University

Principal Investigator

YAMANAKA Naoaki  Keio University, 理工学部, 教授 (80383983)

Co-Investigator(Kenkyū-buntansha) OKAMOTO Satoshi  慶應義塾大学, 理工学研究科, 准教授 (10449027)
ARAKAWA Yutaka  九州大学, システム情報科学研究院, 助教 (30424203)
Project Period (FY) 2007 – 2009
Project Status Completed (Fiscal Year 2009)
Budget Amount *help
¥13,780,000 (Direct Cost: ¥10,600,000、Indirect Cost: ¥3,180,000)
Fiscal Year 2009: ¥3,510,000 (Direct Cost: ¥2,700,000、Indirect Cost: ¥810,000)
Fiscal Year 2008: ¥3,510,000 (Direct Cost: ¥2,700,000、Indirect Cost: ¥810,000)
Fiscal Year 2007: ¥6,760,000 (Direct Cost: ¥5,200,000、Indirect Cost: ¥1,560,000)
KeywordsGMPLS / 並列リコンフィギュラブルプロセッサ / DAPDNA-2 / 最短経路探索 / ダイクストラ法 / オンチップ仮想ネットワーク / トラヒックエンジニアリング / マルチレイヤ / ネットワーク / フォトニックネットワーク / 経路探索
Research Abstract

In this project, in order to realize an effective and flexible traffic control in GMPLS (Generalized Multi-Protocol Label Switching) which is the next generation optical network control protocol, a high-speed shortest path search scheme and a new optical path computation scheme were proposed. By computer simulations and experiments by implementing proposed schemes on a reconfigurable parallel processor, it was shown that the proposed schemes could achieve better performance in calculation time, the resource usage of the network, and so on.

Report

(4 results)
  • 2009 Annual Research Report   Final Research Report ( PDF )
  • 2008 Annual Research Report
  • 2007 Annual Research Report
  • Research Products

    (36 results)

All 2010 2009 2008 2007

All Journal Article (3 results) (of which Peer Reviewed: 3 results) Presentation (27 results) Patent(Industrial Property Rights) (6 results)

  • [Journal Article] Resource Minimization Method Satisfying Delay Constraint for Replicating Large Contents2009

    • Author(s)
      Sho Shimizu, Hiroyuki Ishikawa, Yutaka Arakawa, Naoaki Yamanaka, Kosuke Shiba
    • Journal Title

      IEICE Transactions on Communications Vol.E92-B,No.10

      Pages: 3102-3110

    • NAID

      10026841039

    • Related Report
      2009 Final Research Report
    • Peer Reviewed
  • [Journal Article] Resource Minimization Method Satisfying Delay Constraint for Replicating Large Contents2009

    • Author(s)
      Naoaki Yamanaka
    • Journal Title

      IEICE Transactions on Communications Vol.E92-B, No.10

      Pages: 3102-3110

    • NAID

      10026841039

    • Related Report
      2009 Annual Research Report
    • Peer Reviewed
  • [Journal Article] GMPLS interoperability tests in Kei-han-na info-Communication Open Laboratory on JGN II network2007

    • Author(s)
      岡本 聡、山中 直明, 他7名
    • Journal Title

      IEICE Transactions on Communications Vol.E90-B,No.8

      Pages: 1936-1943

    • NAID

      110007538428

    • Related Report
      2007 Annual Research Report
    • Peer Reviewed
  • [Presentation] Energy Efficient Network Design Tool for Green IP/Ethernet Networks2010

    • Author(s)
      Naoaki YAMANAKA, Sho SHIMIZU, Gao Shan
    • Organizer
      14th Conference on Optical Network Design and Modeling
    • Place of Presentation
      京都
    • Year and Date
      2010-02-01
    • Related Report
      2009 Final Research Report
  • [Presentation] [Invited] Energy Efficient Network Design Tool for Green IP/Ethernet Networks2010

    • Author(s)
      Naoaki Yamanaka
    • Organizer
      ONDM 2010(14^<th> Conference on Optical Network Design and Modeling)
    • Place of Presentation
      日本、京都
    • Year and Date
      2010-02-01
    • Related Report
      2009 Annual Research Report
  • [Presentation] Reducing Network Power Consumption Using Dynamic Link Metric Method and Power Off Links2009

    • Author(s)
      Gao Shan, Zhou Jia, Aya Tsurusaki, Naoaki Yamanaka
    • Organizer
      IEEE Seoul Section International Student Paper Contest 2009
    • Place of Presentation
      ソウル, 韓国
    • Year and Date
      2009-12-05
    • Related Report
      2009 Final Research Report
  • [Presentation] Reducing Network Power Consumption Using Dynamic Link Metric Method and Power Off Links2009

    • Author(s)
      Naoaki Yamanaka
    • Organizer
      IEEE Seoul Section International Student Paper Contest 2009
    • Place of Presentation
      韓国、ソウル
    • Year and Date
      2009-12-05
    • Related Report
      2009 Annual Research Report
  • [Presentation] A Novel Traffic Engineering Method using On-Chip Diorama Network on Dynamically Reconfigurable Processor DAPDNA-22009

    • Author(s)
      高山, 木原拓, 清水翔, 荒川豊, 山中直明, 渡辺昭文
    • Organizer
      HPSR (High Performance Switching and Routing
    • Place of Presentation
      パリ, フランス
    • Year and Date
      2009-06-23
    • Related Report
      2009 Final Research Report
  • [Presentation] A Novel Traffic Engineering Method using On-Chip Diorama Network on Dynamically Reconfigurable Processor DAPDNA-22009

    • Author(s)
      Naoaki Yamanaka
    • Organizer
      HPSR(High Performance Switching and Routing)2009
    • Place of Presentation
      フランス、パリ
    • Year and Date
      2009-06-23
    • Related Report
      2009 Annual Research Report
  • [Presentation] Reducing Network Power Consumption Using Dynamic Link Metric Method and Power Off Links2009

    • Author(s)
      Naoaki Yamanaka
    • Organizer
      電子情報通信学会インターネットアーキテクチャ研究会
    • Place of Presentation
      日本、東京(機械振興会館)
    • Year and Date
      2009-06-19
    • Related Report
      2009 Annual Research Report
  • [Presentation] 並列ブロセッサDAPDNA-2を用いたリンクディスジョイント経路計算の高速解法2009

    • Author(s)
      山中 直明
    • Organizer
      電子情報通信学会リコンフィギャラブルシステム研究会
    • Place of Presentation
      慶應義塾大学
    • Year and Date
      2009-01-30
    • Related Report
      2008 Annual Research Report
  • [Presentation] Traffic Engineering based on Experimentation in On-chip Virtual Network on Dyamically Reconfigurable Processor2008

    • Author(s)
      Shan GAO, Taku KIHARA, Sho SHIMIZU, Yutaka ARAKAWA, Naoaki YAMANAKA, Kosuke SHIBA
    • Organizer
      International Student Paper Contest, Seoul Section 2008
    • Place of Presentation
      ソウル, 韓国
    • Year and Date
      2008-11-29
    • Related Report
      2009 Final Research Report
  • [Presentation] Traffic Engineering based on Experimentation in On-chip Virtual Network on Dynamically Reconfigurable Processor2008

    • Author(s)
      Naoaki Yamanaka
    • Organizer
      IEEE Seoul Section International student Paper Contest 2008
    • Place of Presentation
      ソウル、韓国
    • Year and Date
      2008-11-29
    • Related Report
      2008 Annual Research Report
  • [Presentation] ダイナミックリコンフィギュラブルプロセッサDAPDNA-2上のオンチッブ仮想ネットワークによる新しいネットワーク最適化手法2008

    • Author(s)
      山中 直明
    • Organizer
      電子情報通信学会リコンフィギヤラブルシステム研究会
    • Place of Presentation
      北九州
    • Year and Date
      2008-11-18
    • Related Report
      2008 Annual Research Report
  • [Presentation] Fast Replica Allocation Method by Parallel Calculation on DAPDNA-2 (Best Paper Award)2008

    • Author(s)
      Hiroyuki Ishikawa, Sho Shimizu, Yutaka Arakawa, Naoaki Yamanaka, Kosuke Shiba
    • Organizer
      The 14th Asia-Pacific Conference on Communications
    • Place of Presentation
      秋葉原, 東京
    • Year and Date
      2008-10-15
    • Related Report
      2009 Final Research Report
  • [Presentation] Adaptive Resource Reservation Protocol for High-speed Resource Information Advertisement2008

    • Author(s)
      Masahiro Nishida, Hiroyuki Ishikawa, Sho Shimizu, Yutaka Arakawa, Satoru Okamoto, Naoaki Yamanaka
    • Organizer
      The 14th Asia-Pacific Conference on Communications (APCC 2008)
    • Place of Presentation
      秋葉原, 東京
    • Year and Date
      2008-10-15
    • Related Report
      2009 Final Research Report
  • [Presentation] Fast Link-Disjoint Path Algorithm on Parallel Reconfigurable Processor DAPDNA-22008

    • Author(s)
      Taku KIHARA, Sho SHIMIZU, Yutaka ARAKAWA, Naoaki YAMANAKA, Kosuke SHIBA
    • Organizer
      International Conference on The 14th Asia-Paciffic Conference on Communications (APCC2008)
    • Place of Presentation
      秋葉原, 東京
    • Year and Date
      2008-10-15
    • Related Report
      2009 Final Research Report
  • [Presentation] Adaptive Resource Reservation Protocol for High-speed Resource Information Advertisement2008

    • Author(s)
      Satoru Okamoto
    • Organizer
      The 14th Asia-Pacifie Conference on Communications (APCC 2008)
    • Place of Presentation
      秋葉原、東京
    • Year and Date
      2008-10-15
    • Related Report
      2008 Annual Research Report
  • [Presentation] Fast Link-Disjoint Path Search Algorithm on Parallel Reconfigurable Processor DAPDNA-22008

    • Author(s)
      Yutaka Arakawa
    • Organizer
      The 14th Asia-Pacifie Conference on Communications (APCC 2008)
    • Place of Presentation
      秋葉原、東京
    • Year and Date
      2008-10-15
    • Related Report
      2008 Annual Research Report
  • [Presentation] Hardware Based Scalable Path Computation Engine for Multilayer Traffic Engineering in GMPLS networks2008

    • Author(s)
      Sho Shimizu, Taku Kihara, Yutaka Arakawa, Naoaki Yamanaka, Kosuke Shiba
    • Organizer
      34th European Conference on Optical Communication
    • Place of Presentation
      ブリュッセル、ベルギー
    • Year and Date
      2008-09-25
    • Related Report
      2009 Final Research Report
  • [Presentation] Hardware Based Scalable Path Computation Engine for Multilayer Traffic Engineering in GMPLS networks2008

    • Author(s)
      Naoaki Yamanaka
    • Organizer
      34th European Conference on Optical Communi cation (ECOC 2008)
    • Place of Presentation
      ブリュッセル、ベルギー
    • Year and Date
      2008-09-25
    • Related Report
      2008 Annual Research Report
  • [Presentation] リンクディスジョイント経路計算の高速解法の-検討〜DAPDNA-2による並列マルチレイヤ経路計算〜2008

    • Author(s)
      山中 直明
    • Organizer
      電子情報通信学会フォトニックネットワーク研究会
    • Place of Presentation
      北海道
    • Year and Date
      2008-08-08
    • Related Report
      2008 Annual Research Report
  • [Presentation] A prototype of a dynamically reconfigurable processor based off-loading engine for accelerating the shortest path calculation with GNU Zebra2008

    • Author(s)
      Sho Shimizu, Taku Kihara, Yutaka Arakawa, Naoaki Yamanaka, Kosuke Shiba
    • Organizer
      2008 International Conference on High Performance Switching and Routing (HPSR 2008)
    • Place of Presentation
      上海、中国
    • Year and Date
      2008-05-16
    • Related Report
      2009 Final Research Report
  • [Presentation] A prototype of a dynamically reconfigurable processor based of f-loading engine for accelerating the shortest path calculation with GNU Zebra2008

    • Author(s)
      Naoaki Yamanaka
    • Organizer
      2008 International Conference on High Performance Switching and Routing (HPSR 2008)
    • Place of Presentation
      上海、中国
    • Year and Date
      2008-05-16
    • Related Report
      2008 Annual Research Report
  • [Presentation] 並列リコンフィギャラブルプロセッサDAPDNA-2を用いた集合被覆問題の高速解法2008

    • Author(s)
      山中 直明
    • Organizer
      電子情報通信学会技術研究報告, リコンフィギャラブルシステム研究会
    • Place of Presentation
      横浜
    • Year and Date
      2008-01-16
    • Related Report
      2007 Annual Research Report
  • [Presentation] GMPLSにおける予約可能資源情報の高速な伝播方法2007

    • Author(s)
      山中 直明
    • Organizer
      電子情報通信学会技術研究報告, フォトニックネットワーク研究会
    • Place of Presentation
      富山
    • Year and Date
      2007-08-10
    • Related Report
      2007 Annual Research Report
  • [Presentation] SubFrame-Based Slot Reservation Scheme for Minimizing Transmission Delay in Optical Slot Switching Network2007

    • Author(s)
      山中 直明
    • Organizer
      12th OptoElectronics and Communications Conference/16th International Conference on Integrated Optics and Optical Fiber Communication(OECC/IOOC 2007)
    • Place of Presentation
      横浜
    • Year and Date
      2007-07-13
    • Related Report
      2007 Annual Research Report
  • [Presentation] New Parallel Shortest Path Searching Algorithm based on Dynamically Reconfigurable Processor DAPDNA-22007

    • Author(s)
      Hiroyuki ISHIKAWA, Sho SHIMIZU, Yutaka ARAKAWA, Naoaki YAMANAKA, Kosuke SHIBA
    • Organizer
      2007 IEEE International Conference on Communications (ICC2007)
    • Place of Presentation
      グラスゴー, イギリス
    • Year and Date
      2007-06-27
    • Related Report
      2009 Final Research Report
  • [Presentation] New Parallel Shortest Path Searching Algorithm based on Dynamically Reconfigurable Processor DAPDNA-22007

    • Author(s)
      山中 直明
    • Organizer
      2007 IEEE International Conference on Communi cations(ICC2007)
    • Place of Presentation
      Glasgow
    • Year and Date
      2007-06-27
    • Related Report
      2007 Annual Research Report
  • [Presentation] Design and Implementation of GMPLS-based Optical Slot Switching Network with PIZT High-speed Optical Switch2007

    • Author(s)
      山中 直明
    • Organizer
      2007 Workshop on High Performance Switching and Routing(HPSR 2007)
    • Place of Presentation
      New York
    • Year and Date
      2007-05-31
    • Related Report
      2007 Annual Research Report
  • [Patent(Industrial Property Rights)] ネットワークに含まれるノード間の経路を探索するためのシステムおよび方法2008

    • Inventor(s)
      山中直明、高山、荒川豊、斯波康祐
    • Industrial Property Number
      2008-202323
    • Filing Date
      2008-08-05
    • Related Report
      2009 Final Research Report
  • [Patent(Industrial Property Rights)] ネットワークの電源制御方法及びネットワークの電源制御装置2008

    • Inventor(s)
      山中直明、荒川豊、津留崎彩、渡辺昭文、藤田勉
    • Industrial Property Number
      2008-193937
    • Filing Date
      2008-07-28
    • Related Report
      2009 Final Research Report
  • [Patent(Industrial Property Rights)] 集合被覆問題解決プログラム及びネットワークサーバの配置決定方法2008

    • Inventor(s)
      山中直明、石川浩行、荒川豊、清水翔、斯波康祐
    • Industrial Property Number
      2008-053825
    • Filing Date
      2008-03-04
    • Related Report
      2009 Final Research Report
  • [Patent(Industrial Property Rights)] ネットワークに含まれるノート間の経路を探索するためのシステムおよび方法2008

    • Inventor(s)
      山中直明, 高山, 荒川豊, 斯波康祐
    • Industrial Property Rights Holder
      慶應義塾大学
    • Industrial Property Number
      2008-202323
    • Filing Date
      2008-08-05
    • Related Report
      2008 Annual Research Report
  • [Patent(Industrial Property Rights)] ネットワークに含まれるノード間の経路を探索するためのシステム及び方法2007

    • Inventor(s)
      山中直明、荒川豊、木原拓、清水翔
    • Industrial Property Number
      2007-312648
    • Filing Date
      2007-12-03
    • Acquisition Date
      2009-06-25
    • Related Report
      2009 Final Research Report
  • [Patent(Industrial Property Rights)] ネットワークに含まれるノード間の経路を探索するためのシステムおよび方法2007

    • Inventor(s)
      山中 直明、荒川 豊, 他3名
    • Industrial Property Rights Holder
      山中 直明、荒川 豊, 他3名
    • Industrial Property Number
      2007-312648
    • Filing Date
      2007-12-03
    • Related Report
      2007 Annual Research Report

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Published: 2007-04-01   Modified: 2016-04-21  

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