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Floorplanning Automation Layout Systems by EQ-Sequence

Research Project

Project/Area Number 19500018
Research Category

Grant-in-Aid for Scientific Research (C)

Allocation TypeSingle-year Grants
Section一般
Research Field Fundamental theory of informatics
Research InstitutionKumamoto University

Principal Investigator

ZHAO Hua-an  Kumamoto University, 大学院・自然科学研究科, 教授 (60258340)

Project Period (FY) 2007 – 2008
Project Status Completed (Fiscal Year 2008)
Budget Amount *help
¥2,470,000 (Direct Cost: ¥1,900,000、Indirect Cost: ¥570,000)
Fiscal Year 2008: ¥780,000 (Direct Cost: ¥600,000、Indirect Cost: ¥180,000)
Fiscal Year 2007: ¥1,690,000 (Direct Cost: ¥1,300,000、Indirect Cost: ¥390,000)
KeywordsVLSIレイアウト / フロアプラン / 配置と配線 / システムオンチップ
Research Abstract

近年, VLSI(超大規模集積回路)の集積度が大幅に向上しており, 搭載する回路規模が同程度であれば, チップ面積の減少, または, 使用するチップ面積が同程度であれば, 搭載される回路規模の増大である. 本研究はEQ-Sequenceによりフロアプランを表現し, 2007年度, 配置を完成したうえで, 2008年度では, 概略配線について研究を行った. 概略配線の結果はフィードバックされ, 高位合成のRTL設計または再配置するために利用される. 本研究の成果はフロアプランによるVLSIの配置配線の全自動化に資することが大きいと思われる.

Report

(3 results)
  • 2008 Annual Research Report   Final Research Report ( PDF )
  • 2007 Annual Research Report
  • Research Products

    (17 results)

All 2009 2008 2007 Other

All Journal Article (3 results) (of which Peer Reviewed: 3 results) Presentation (9 results) Remarks (5 results)

  • [Journal Article] 時空間トレリス符号の行列式設計規範における最小行列式の高速算出アルゴリズム2009

    • Author(s)
      福田龍樹
    • Journal Title

      電子情報通信学会和文論文誌 Vol. J92-B No. 1

      Pages: 207-215

    • Related Report
      2008 Annual Research Report
    • Peer Reviewed
  • [Journal Article] A Programmable Frequency Divider in 0.18μm CMOS Library2008

    • Author(s)
      Qingsheng HU
    • Journal Title

      Proc. of IEEE Computer Society Annual Symposium on VLSI (CD-ROM)

      Pages: 157-161

    • Related Report
      2008 Annual Research Report
    • Peer Reviewed
  • [Journal Article] Initial Global Routing in Floorplanning by EQ-Sequence2008

    • Author(s)
      Hua-An ZHAO
    • Journal Title

      Prof. of 2008 IEEE International Symposium on Industrial Electronics (CD-ROM)

      Pages: 1746-1750

    • Related Report
      2008 Annual Research Report
    • Peer Reviewed
  • [Presentation] A Hash Algorithm for Memory Management in Xen2009

    • Author(s)
      H. Matsuda, Y. Tokunaga and H. A. ZHAO
    • Organizer
      Proc. of 2009 International Workshop on Nonlinear Circuits and Signal Proc
    • Place of Presentation
      USA
    • Year and Date
      2009-03-02
    • Related Report
      2008 Final Research Report
  • [Presentation] Initial Global Routing in Floorplanning by EQ-Sequence2008

    • Author(s)
      H. A. ZHAO, C. LIU and Q. S. HU
    • Organizer
      Proc. of IEEE International Symposium on Industrial Electronics
    • Place of Presentation
      UK
    • Year and Date
      2008-06-30
    • Related Report
      2008 Final Research Report
  • [Presentation] A Programmable Frequency Divider in 0.18μm CMOS Library2008

    • Author(s)
      Q. S. HU, H. A. ZHAO and C. LIU
    • Organizer
      Proc. of IEEE Computer Society Annual Symposium on VLSI
    • Place of Presentation
      France
    • Year and Date
      2008-04-08
    • Related Report
      2008 Final Research Report
  • [Presentation] A Programmable Frequency Divider in 0.18μm CMOS Library2008

    • Author(s)
      趙 華安 (Hua-An Zhao)
    • Organizer
      2008 IEEE Computer Society Annual Symposium on VLSI
    • Place of Presentation
      フランス,モンペリエ
    • Related Report
      2007 Annual Research Report
  • [Presentation] Initial Global Routing in Floorplanning by EQ-Sequence2008

    • Author(s)
      趙 華安 (Hua-An Zhao)
    • Organizer
      2008 IEEE International Symposium on Industrial Electronics
    • Place of Presentation
      英国,ケンブリッジ大学
    • Related Report
      2007 Annual Research Report
  • [Presentation] A High-speed Fair Scalable Scheduling Architecture2007

    • Author(s)
      Q. S HU, C. LIU and H. A. ZHAO
    • Organizer
      Proceedings of 2007 International Symposium on Intelligent Signal Processing and Communication Systems
    • Place of Presentation
      China
    • Year and Date
      2007-12-01
    • Related Report
      2008 Final Research Report
  • [Presentation] フロアプランにおけるグローバル概略配線について2007

    • Author(s)
      趙華安, 小嶌一生
    • Organizer
      2007年電子情報通信学会ソサイエティ大会講演論文集A-3-11
    • Place of Presentation
      鳥取
    • Year and Date
      2007-09-13
    • Related Report
      2008 Final Research Report
  • [Presentation] フロアプランにおけるグローバル概略配線について2007

    • Author(s)
      趙 華安
    • Organizer
      2007年電子情報通信学会ソサイエティ大会
    • Place of Presentation
      日本,鳥取大学
    • Related Report
      2007 Annual Research Report
  • [Presentation] A High-speed Fair Scalable Scheduling Architecture2007

    • Author(s)
      趙 華安 (Hua-An Zhao)
    • Organizer
      2007 International Symposium on Intelligent Signal Processing and Communication Systems
    • Place of Presentation
      中国,アモイ
    • Related Report
      2007 Annual Research Report
  • [Remarks] 熊本県において, 産官学の有機的に結合するために, 本研究の内容を講演会で紹介したことがあり, 地方のVLSI工業に貢献した

    • Related Report
      2008 Final Research Report
  • [Remarks]

    • URL

      http://www.kumamoto-u.ac.jp/seeds/seeds/25000255/index.html

    • Related Report
      2008 Final Research Report
  • [Remarks]

    • URL

      http://www.rist.gr.jp/html/N123.html

    • Related Report
      2008 Final Research Report
  • [Remarks]

    • URL

      http://www.kumamoto-u.ac.jp/seeds/seeds/25000255/index.html

    • Related Report
      2008 Annual Research Report
  • [Remarks]

    • URL

      http://www.rist.gr.jp/html/N123.html

    • Related Report
      2008 Annual Research Report

URL: 

Published: 2007-04-01   Modified: 2016-04-21  

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