Time-Domain Analog Circuit for Nano CMOS VLSI
| Project/Area Number |
19560334
|
|---|
| Research Category |
Grant-in-Aid for Scientific Research (C)
|
| Allocation Type | Single-year Grants |
|---|
| Section | 一般 |
|---|
| Research Field |
Electron device/Electronic equipment
|
|---|
| Research Institution | Gunma University |
|---|
Principal Investigator |
KOBAYASHI Haruo Gunma University, 大学院・工学研究科, 教授 (20292625)
|
|---|
| Project Period (FY) |
2007 – 2009
|
| Project Status |
Completed (Fiscal Year 2009)
|
| Budget Amount *help |
¥4,290,000 (Direct Cost: ¥3,300,000、Indirect Cost: ¥990,000)
Fiscal Year 2009: ¥650,000 (Direct Cost: ¥500,000、Indirect Cost: ¥150,000)
Fiscal Year 2008: ¥1,950,000 (Direct Cost: ¥1,500,000、Indirect Cost: ¥450,000)
Fiscal Year 2007: ¥1,690,000 (Direct Cost: ¥1,300,000、Indirect Cost: ¥390,000)
|
|---|
| Keywords | 時間領域アナログ回路 / タイムデジタイザ回路 / デジタルPWM路 / デジタルアシストアナログ回路 / 完全デジタルPLL回路 / デジタル自己校正 / デジタル誤差補正回路 / デジタルPWM回路 / 時間デジタル変換回路 / ナノCMOS / アナログ回路 / デジタル電源 / AD変換器 / サンプリング回路 / 低電圧 / サンプリング海路 |
|---|
| Research Abstract |
We have achieved the followings for time-domain analog circuit technology in nano CMOS VLSI:
(1) High-speed, low-power AD converter architecture using time-domain redundancy algorithm.
(2) Two novel time-to-digital converter architectures
2-1) Stochastic time-to-digital converter with self-calibration
2-2) High-resolution, low-power time-to-digital converter by improving the vernia-type architecture.
(3) High-resolution, low-power digital PMW generator architecture and its application to digitally-controlled power supply
(4) EMI reduction spread-spectrum clocking algorithm with combination of PWM and PPM (pulse position modulation) in digitally-controlled power supply.
(5) Development of all digital phase-clocked loop circuit for TV tuner application with fast frequency locking.
(6) Low-noise high-frequency waveform sampling method.These results have been transferred to industry through patents and papers.
|
Report
(4 results)
Research Products
(39 results)
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
[Presentation] TVチューナ用ADPLLの検討2009
Author(s)
田辺朋之, 林海軍, 内藤智洋, 高橋伸夫, 壇徹, 馬場清一, 北村真一, 小林春夫, 傘昊, 高井伸和
Organizer
電子情報通信学会総合大会
Place of Presentation
愛媛
Year and Date
2009-03-19
Related Report
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
