Three-Dimensionally Stacked Hetero-Chip Fabrication by Self-Assembly

• Project/Area Number: 19686022
• Research Category: Grant-in-Aid for Young Scientists (A)
• Allocation Type: Single-year Grants
• Research Field: Electron device/Electronic equipment
• Research Institution: Tohoku University
• Principal Investigator: FUKUSHIMA Takafumi Tohoku University, 大学院・工学研究科, 助教 (10374969)
• Co-Investigator(Renkei-kenkyūsha): KOYANAGI Mitsumasa 東北大学, 大学院・工学研究科, 教授 (60205531) ; TANAKA Tetsu 東北大学, 大学院・医工学研究科, 教授 (40417382)
• Project Period (FY): 2007 – 2009
• Project Status: Completed (Fiscal Year 2009)
• Budget Amount: ¥23,010,000 (Direct Cost: ¥17,700,000、Indirect Cost: ¥5,310,000); Fiscal Year 2009: ¥5,590,000 (Direct Cost: ¥4,300,000、Indirect Cost: ¥1,290,000); Fiscal Year 2008: ¥8,840,000 (Direct Cost: ¥6,800,000、Indirect Cost: ¥2,040,000); Fiscal Year 2007: ¥8,580,000 (Direct Cost: ¥6,600,000、Indirect Cost: ¥1,980,000)
• Keywords: インターコネクト・パッケージのシステム化・応用 / 自己組織化 / マイクロ・ナノデバイス / 流体 / 微細接続 / システムオンチップ

Research Abstract

We have provided new three-dimensional integration technology based on high-precision multi-chip self-assembly using surface tension of liquid droplets. We have successfully fabricated heterogeneous multi-chip test module using the self-assembly technology. The alignment accuracy was found to be within 1 micron, and more than 500 chips can be self-assembled on substrates in batch. In addition, the chips were tightly bonded to the substrates at room temperature without thermal compression.

Research Products

• [Journal Article] Surface tension-driven chip self-assembly with load-free hydrogen fluoride-assisted direct bonding at room temperature for three-dimensional integrated circuits (2010)
  • Author(s): T. Fukushima, E. Iwata, T. Konno, K. -W. Lee, T. Tanaka, M. Koyanagi
  • Journal Title: Applied Physics Letters Vol.96
  • Peer Reviewed
• [Journal Article] Surface tension-driven chip self-assembly with load-free hydrogen fluoride-assisted direct bonding at room temperature for three-dimensional integrated circuits (2010)
  • Author(s): T.Fukushima, E.Iwata, T.Konno, K.-W.Lee, T.Tanaka, M.Koyanagi
  • Journal Title: Applied Physics Letters 96(accepted)
  • Peer Reviewed
• [Journal Article] Three-Dimensional Integration Technology Based on Reconfigured Wafer-to-Wafer and Multichip-to-Wafer Stacking Using Self-Assembly Method (2009)
  • Author(s): Takafumi Fukushima, Eiji Iwata, Yuki Ohara, Akihiro Noriki, Kiyoshi Inamura, Kang-Wook Lee, Jicheol Bea, Tetsu Tanaka, Mitsumasa Koyanagi
  • Journal Title: IEEE IEDM Technical Digest Pages: 349-352
  • NAID: 110008001112
  • Peer Reviewed
• [Journal Article] Cu Filling Characteristics in Through-Si Via Holes by Electroless Plating with Addition of Inhibitors (2009)
  • Author(s): F. Inoue, M. Koyanagi, T. Fukushima, K. Yamamoto, S. Tanaka, Z. wang, S. Shingubara
  • Journal Title: ECS Transactions Vol.16 Pages: 27-32
  • Peer Reviewed
• [Journal Article] Optical Interposer Technology using Buried Vertical-Cavity Surface-Emitting Laser Chip and Tapered Through-Silicon Via for High-Speed Chip-to-Chip Optical Interconnection (2009)
  • Author(s): Akihiro Noriki, Makoto Fujiwara, Kang-Wook Lee, Woo-Cheol Jeong, Takafumi Fukushima, Tetsu Tanaka, Mitsumasa Koyanagi
  • Journal Title: Japanese Journal of Applied Physics Vol.48
  • NAID: 210000066624
  • Peer Reviewed
• [Journal Article] 三次元積層型チップのためのSi貫通ビア(TSV)形成技術 (2009)
  • Author(s): 福島誉史, 田中徹, 小柳光正
  • Journal Title: エレクトロニクス実装学会誌 Vol.12 Pages: 105-109
  • NAID: 110007122665
  • Peer Reviewed
• [Journal Article] High-Density Through Silicon Vias for 3-D LSIs (2009)
  • Author(s): Mitsumasa Koyanagi, Takafumi Fukushima, Tetsu Tanaka
  • Journal Title: Proceedings of the IEEE Vol.97 Pages: 49-59
  • Peer Reviewed
• [Journal Article] Cu Filling Characteristics in Through-Si Via Holes by Electroless Plating with Addition of Inhibitors (2009)
  • Author(s): F.Inoue, M.Koyanagi, T.Fukushima, K.Yamamoto, S.Tanaka, Z.wang, S.Shingubara
  • Journal Title: ECS Transactions 16 Pages: 27-32
  • Peer Reviewed
• [Journal Article] Optical Interposer Technology using Buried Vertical-Cavity Surface-Emitting Laser Chip and Tapered Through-Silicon Via for High-Speed Chip-to-Chip Optical Interconnection (2009)
  • Author(s): Akihiro Noriki, Makoto Fujiwara, Kang-Wook Lee, Woo-Cheol Jeong, Takafumi Fukushima, Tetsu Tanaka, Mitsumasa Koyanagi
  • Journal Title: Japanese Journal of Applied Physics 48
  • NAID: 210000066624
  • Peer Reviewed
• [Journal Article] 三次元積層型チップのためのSi貫通ビア(Tsv)形成技術 (2009)
  • Author(s): 福島誉史
  • Journal Title: エレクトロニクス実装学会誌 12 Pages: 105-109
  • NAID: 110007122665
  • Peer Reviewed
• [Journal Article] HighDensity Through Silicon Vias for 3-D LSIs (2009)
  • Author(s): Mitsumasa Koyanagi
  • Journal Title: Proceedings of the IEEE 97 Pages: 49-59
  • Peer Reviewed
• [Journal Article] New Heterogeneous Multi-Chip Module Integration Technology Using Self-Assembly Method (2008)
  • Author(s): T. Fukushima, T. Konno, K. Kiyoyama, M. Murugesan, K. Sato, W. -C. Jeong, Y. Ohara, Noriki, S. Kanno, Y. Kaiho, H. Kino, K. Makita, R. Kobayashi, C. -K. Yin, K. Inamura, K. -W. Lee, J. -C. Bea, T. Tanaka, M. Koyanagi
  • Journal Title: International Electron Devices Meeting (IEDM) Technical Digest Pages: 499-502
  • Peer Reviewed
• [Journal Article] Low-Loss Optical Interposer with Recessed Vertical-Cavity Surface-Emitting Laser Diode and Photodiode Chips into Si Substrate (2008)
  • Author(s): Makoto Fujiwara, Shinsuke Terada, Yoji Shirato, Hiroshi Owari, Kei Watanabe, Mutsuhiro Matsuyama, Keizo Takahama, Tetsuya. Mori, Kenji Miyao, Koji Choki, Takafumi Fukushima, Tetsu Tanaka, Mitsumasa Koyanagi
  • Journal Title: Japanese Journal of Applied Physics Vol.47 Pages: 2936-2940
  • Peer Reviewed
• [Journal Article] Tungsten Through-Silicon Via Technology for Three-Dimensional LSIs (2008)
  • Author(s): H. Kikuchi, Y. Yamada, A.M. Ali, J. Liang, T. Fukushima, T. Tanaka, M. Koyanagi
  • Journal Title: Japanese Journal of Applied Physics Vol.47 Pages: 2801-2806
  • Peer Reviewed
• [Journal Article] 自己組織化ウェーハ張り合わせによる三次元集積化技術 (2008)
  • Author(s): 福島誉史, 田中徹, 小柳光正
  • Journal Title: 応用物理学会分科会シリコンテクノロジー「多層配線」特集号 No.99 Pages: 34-37
  • NAID: 110006935847
• [Journal Article] New Heterogeneous Multi-Chip Module Integration Technology Using SelfAssembly Method (2008)
  • Author(s): Takafumi Fukushima
  • Journal Title: International Electron Devices Meeting(IEDM) Technical Digest Pages: 499-502
  • Peer Reviewed
• [Journal Article] Low-Loss Optical Interposer with Recessed VerticalCavity SurfaceEmitting Laser Diode and Photodiode Chips into Si Substrate (2008)
  • Author(s): Makoto iwara
  • Journal Title: Japanese Journal of Applied Physics 47 Pages: 2936-2940
  • Peer Reviewed
• [Journal Article] Tungsten through-Silicon Via Technology for Three-Dimensional LSIs (2008)
  • Author(s): Hirokazu Kikuchi
  • Journal Title: Japanese Journal of Applied Physics 47 Pages: 2801-2806
  • Peer Reviewed
• [Journal Article] 自己組織化ウェーハ張り合わせによる三次元集積化技術 (2008)
  • Author(s): 福島誉史
  • Journal Title: 応用物理学会分科会 シリコンテクノロジー「多層配線」特集号 No.99 Pages: 34-37
  • NAID: 110006935847
• [Journal Article] New Three-Dimensional Integration Technology Based on Reconfigured Wafer-on-Wafer Bonding Technique (2007)
  • Author(s): Takafumi Fukushima, Hirokazu Kikuchi, Yusuke Yamada, Takayuki Konno, Jun Liang, Keiichi Sasaki, Kiyoshi Inamura, Tetsu Tanaka, Mitsumasa Koyanagi
  • Journal Title: International Electron Devices Meeting (IEDM) Technical Digest Pages: 985-988
  • NAID: 120002070107
  • Peer Reviewed
• [Journal Article] New Three-Dimensional Integration Technology Based on Reconfigured Wafer-on-Wafer Bonding Technique (2007)
  • Author(s): Takafumi Fukushima
  • Journal Title: International Electron Devices Meeting (IEDM) Technical Digest Pages: 985-988
  • NAID: 120002070107
  • Peer Reviewed
• [Presentation] 金属マイクロバンプ接合を介した自己組織化チップ積層 (2010)
  • Author(s): 岩田永司, 福島誉史, 李康旭, 田中徹, 小柳光正
  • Organizer: 第57回応用物理学関係連合講演会
  • Place of Presentation: 平塚
  • Year and Date: 2010-03-19
• [Presentation] セルフアセンブリを基盤としたウェーハレベル三次元集積化技術 (2010)
  • Author(s): 福島誉史, 李康旭, 田中徹, 小柳光正
  • Organizer: 応用物理学会 シリコンテクノロジー分科会/電子情報通信学会 シリコン材料・デバイス研究会(SDM) 第118回研究集会
  • Place of Presentation: 東京
  • Year and Date: 2010-01-29
• [Presentation] セルフアセンブリを基盤としたウェーハレベル三次元集積化技術 (2010)
  • Author(s): 福島誉史, 李康旭, 田中徹, 小柳光正
  • Organizer: 応用物理学会 シリコンテクノロジー分科会/電子情報通信学会 シリコン材料・デバイス研究会(SDM)第118回研究集会
  • Place of Presentation: 東京
  • Year and Date: 2010-01-29
• [Presentation] 3D積層技術 (2010)
  • Author(s): 福島誉史, 李康旭, 田中徹, 小柳光正
  • Organizer: IEEE Electron Devices Society (EDS) Japan Chapter総会・2009 International Electron Devices Meeting (IEDM)報告会
  • Place of Presentation: 東京
  • Year and Date: 2010-01-26
• [Presentation] 3D積層技術 (2010)
  • Author(s): 福島誉史, 李康旭, 田中徹, 小柳光正
  • Organizer: IEEE Electron Devices Society(EDS)Japan Chapter 総会・2009 International Electron Devices Meeting(IEDM)報告会
  • Place of Presentation: 東京
  • Year and Date: 2010-01-26
• [Presentation] Self-Assembly Technology for Advanced Die-to-Wafer 3D Integration (2010)
  • Author(s): Takafumi Fukushima, Kang-Wook Lee, Tetsu Tanaka, Mitsumasa Koyanagi
  • Organizer: 2nd International IEEE Workshop on Low Temperature Bonding for 3D Integration
  • Place of Presentation: 東京
  • Year and Date: 2010-01-20
• [Presentation] Three-Dimensional Integration Technology Based on Reconfigured Wafer-to-Wafer and Multichip-to-Wafer Stacking Using Self-Assembly (2009)
  • Author(s): Takafumi Fukushima, Eiji Iwata, Yuki Ohara, Akihiro Noriki, Kiyoshi Inamura, Kang-Wook Lee, Jicheol Bea, Tetsu Tanaka, Mitsumasa Koyanagi
  • Organizer: 2009 IEEE International Electron Devices Meeting(IEDM)
  • Place of Presentation: ボルチモア(USA)
  • Year and Date: 2009-12-08
• [Presentation] High-Aspect-Ratio Fine Cu Sidewall Interconnection over Chip Edge with Tapered Polymer for MEMS-LSI Multi-Chip Module (2009)
  • Author(s): A. Noriki, Y. Kaiho, E. Iwata, Y. Ohara, M. Murugesan, K. -W. Lee, J. -C. Bea, T. Fukushima, T. Tanaka, M. Koyanagi
  • Organizer: 2009 International Conference on Solid State Devices and Materials
  • Place of Presentation: 仙台
  • Year and Date: 2009-10-07
• [Presentation] Self-Assembled 3D Chip Stacking Technology (2009)
  • Author(s): T. Fukushima, Kang-Wook Lee, Tetsu Tanaka, Mitsumasa Koyanagi
  • Organizer: 216th Electrochemical Society (ECS) Meeting
  • Place of Presentation: ウィーン(オーストリー)
  • Year and Date: 2009-10-05
• [Presentation] Self-Assembled 3D Chip Stacking Technology (2009)
  • Author(s): 福島誉史, 李康旭, 田中徹, 小柳光正
  • Organizer: 216th Electrochemical Society(ECS)Meeting
  • Place of Presentation: ウィーン(オーストリー)
  • Year and Date: 2009-10-05
• [Presentation] Development of a NEW Self-Assembled Die bonder to Three-Dimensionally Stack Known Good Dies in Batch (2009)
  • Author(s): Takafumi Fukushima, Eiji Iwata, Kang-Wook Lee, Tetsu Tanaka, Mitsumasa Koyanagi
  • Organizer: IEEE International 3D System Integration Conference 2009 (3DIC)
  • Place of Presentation: サンフランシスコ(USA)
  • Year and Date: 2009-09-30
• [Presentation] Development of a NEW Self-Assembled Die bonder to Three-Dimensionally Stack Known Good Dies in Batch (2009)
  • Author(s): 福島誉史, 岩田永司, 李康旭, 田中徹, 小柳光正
  • Organizer: IEEE International 3D System Integration Conference 2009(3DIC)
  • Place of Presentation: サンフランシスコ(USA)
  • Year and Date: 2009-09-30
• [Presentation] 自己組織化による三次元LSIチップの高精度位置合わせ技術 (2009)
  • Author(s): 岩田永司, 福島誉史, 李康旭, 田中徹, 小柳光正
  • Organizer: 第70回応用物理学会学術講演会
  • Place of Presentation: 富山
  • Year and Date: 2009-09-11
• [Presentation] セルフアセンブリー法を用いた新しいヘテロインテグレーション技術 (2009)
  • Author(s): 福島誉史, 李康旭, 田中徹, 小柳光正
  • Organizer: 応用物理学会シリコンテクノロジー分科会第115回研究集会
  • Place of Presentation: 東京
  • Year and Date: 2009-08-03
• [Presentation] セルフアセンブリー法を用いた新しいヘテロインテグレーション技術 (2009)
  • Author(s): 福島誉史, 李康旭, 田中徹, 小柳光正
  • Organizer: 応用物理学会 シリコンテクノロジー分科会 第115回研究集会
  • Place of Presentation: 東京
  • Year and Date: 2009-08-03
• [Presentation] 3D Integration Technology and 3D Integrated Systems (2009)
  • Author(s): M. Koyanagi, T. Fukushima, T. Tanaka
  • Organizer: IEEE International Interconnect Technology Conference (IITC)
  • Place of Presentation: 札幌
  • Year and Date: 2009-05-31
• [Presentation] 3D Integration Technology and 3D Integrated Systems (2009)
  • Author(s): 小柳光正, 福島誉史, 田中徹
  • Organizer: IEEE International Interconnect Technology Conference(IITC)
  • Place of Presentation: 札幌
  • Year and Date: 2009-05-31
• [Presentation] Cu lateral interconnects formed between 100-um-thick self-assembled chips on flexible substrates (2009)
  • Author(s): M. Murugesan, J.C. Bea, T. Fukushima, T. Konno, K. Kiyoyama, W.C. Jeong, H. Kino, A. Noriki, K.W. Lee, T. Tanaka, M. Koyanagi
  • Organizer: 2009 Electronics Components and Technology Conference (ECTC)
  • Place of Presentation: サンディエゴ(USA)
  • Year and Date: 2009-05-29
• [Presentation] Cu lateral interconnects formed between 100-um-thick self-assembled chips on flexible substrates (2009)
  • Author(s): M.Murugesan, J.C.Bea, T.Fukushima, T.Konno, K.Kiyoyama, W.C.Jeong, H.Kino, A.Noriki, K.W.Lee, T.Tanaka, M.Koyanagi
  • Organizer: 2009 Electronics Components and Technology Conference(ECTC)
  • Place of Presentation: サンディエゴ(USA)
  • Year and Date: 2009-05-29
• [Presentation] 自己組織化によるヘテロインテグレーション技術 (2009)
  • Author(s): 福島誉史
  • Organizer: 第12回低温接合による3D集積化研究会
  • Place of Presentation: 東京
  • Year and Date: 2009-04-22
• [Presentation] Super Chip Integration Technology for Three-Dimensionally Stacked Retinal Prosthesis Chips (2009)
  • Author(s): Takafumi Fukushima, Tetsu Tanaka, Mitsumasa Koyanagi
  • Organizer: Smart System Integration Conference 2009
  • Place of Presentation: ブリュッセル(ベルギー)
  • Year and Date: 2009-03-11
• [Presentation] Super Chip Integration Technology for ThreeDimensionally Stacked Retinal Prosthesis Chips (2009)
  • Author(s): Takafumi Fukushima
  • Organizer: Smart System Integration Conference 2009
  • Place of Presentation: ブリュッセル(ベルギー)
  • Year and Date: 2009-03-11
• [Presentation] 自己組織化を用いた高密度実装技術とスーパーチップインテグレーション" (2009)
  • Author(s): 福島誉史
  • Organizer: 10回半導体パッケージング技術展専門技術セミナー
  • Place of Presentation: 東京
  • Year and Date: 2009-01-30
• [Presentation] 自己組織化を用いた高密度実装技術とスーパーチップインテグレーション (2009)
  • Author(s): 福島誉史
  • Organizer: 10回半導体パッケージング技術展専門技術セミナー
  • Place of Presentation: 東京
  • Year and Date: 2009-01-30
• [Presentation] Three-Dimensional Integration Technology to Achieve Super Chip (2009)
  • Author(s): Takafumi Fukushima, Tetsu Tanaka, Mitsumasa Koyanagi
  • Organizer: SEMICON Korea
  • Place of Presentation: ソウル(韓国)
  • Year and Date: 2009-01-21
• [Presentation] ThreeDimensional Integration Technology to Achieve Super Chip (2009)
  • Author(s): Takafumi Fukushima
  • Organizer: SEMICON Korea
  • Place of Presentation: ソウル(韓国)
  • Year and Date: 2009-01-21
• [Presentation] New Heterogeneous Multi-Chip Module Integration Technology Using Self-Assembly Method (2008)
  • Author(s): T. Fukushima, T. Konno, K. Kiyoyama, M. Murugesan, K. Sato, W. -C. Jeong, Y. Ohara, Noriki, S. Kanno, Y. Kaiho, H. Kino, K. Makita, R. Kobayashi, C. -K. Yin, K. Inamura, K. -W. Lee, J. -C. Bea, T. Tanaka, M. Koyanagi
  • Organizer: International Electron Devices Meeting (IEDM)
  • Place of Presentation: サンフランシスコ(米国)
  • Year and Date: 2008-12-16
• [Presentation] New Heterogeneous Multi-Chip Module Integration Technology Using SelfAssembly Method (2008)
  • Author(s): Takafumi Fukushima
  • Organizer: International Electron Devices Meeting (IEDM)
  • Place of Presentation: サンフランシスコ(米国)
  • Year and Date: 2008-12-16
• [Presentation] Three-Dimensional Integration Technology Based on Self-Assembled Chip-to-Wafer Stacking (2008)
  • Author(s): Takafumi Fukushima, Tetsu Tanaka, Mitsumasa Koyanagi
  • Organizer: 2008 Materials Research Society (MRS) Fall Meeting
  • Place of Presentation: ボストン(米国)
  • Year and Date: 2008-12-01
• [Presentation] ThreeDimensional Integration Technology Based on SelfAssembled Chipto-Wafer Stacking (2008)
  • Author(s): Takafumi Fukushima
  • Organizer: 2008 Materials Research Society (MRS) Fall Meeting
  • Place of Presentation: ボストン(米国)
  • Year and Date: 2008-12-01
• [Presentation] セルフアセンブリーを用いた3次元集積化技術 (2008)
  • Author(s): 福島誉史, 小柳光正
  • Organizer: 九州学術研究都市第8回産学連携フェア
  • Place of Presentation: 小倉
  • Year and Date: 2008-10-09
• [Presentation] セルフアセンブリーを用いた3次元集積化技術 (2008)
  • Author(s): 福島誉史
  • Organizer: 九州学術研究都市第8回産学連携フェア
  • Place of Presentation: 小倉(福岡)
  • Year and Date: 2008-10-09
• [Presentation] Tapered Through-Si Via Formation for Optical Interposer with 3D ICs and Buried Vertical-Cavity Surface-Emitting Laser / Photo Diode Chips (2008)
  • Author(s): Makoto Fujiwara, Akihiro Noriki, Takafumi Fukushima, Tetsu Tanaka, Mitsumasa Koyanagi
  • Organizer: 2008 International Conference on Solid State Devices and Materials (SSDM)
  • Place of Presentation: つくば
  • Year and Date: 2008-09-26
• [Presentation] Tapered Through-Si Via Formation for Optical Interposer with 3D ICs and Buried VerticalCavity SurfaceEmitting Laser / Photo Diode Chips (2008)
  • Author(s): Makoto Fujiwara
  • Organizer: 2008 International Conference on Solid State Devices and Materials (SSDM)
  • Place of Presentation: つくば(茨城)
  • Year and Date: 2008-09-26
• [Presentation] Self-Assembly for Heterogeneous Integration with Lateral Interconnections Extending over MEMS and LSI Chips (2008)
  • Author(s): Takayuki Konno, Takafumi Fukushima, Tetsu Tanaka, Mitsumasa Koyanagi
  • Organizer: 2008 International Conference on Solid State Devices and Materials (SSDM)
  • Place of Presentation: つくば
  • Year and Date: 2008-09-25
• [Presentation] SelfAssembly for Heterogeneous Integration with Lateral Interconnections Extending over MEMS and LSI Chips (2008)
  • Author(s): Takayuki Konno
  • Organizer: 2008 International Conference on Solid State Devices and Materials (SSDM)
  • Place of Presentation: つくば(茨城)
  • Year and Date: 2008-09-25
• [Presentation] 3D system integration technology and 3D systems (2008)
  • Author(s): Takafumi Fukushima, Tetsu Tanaka, Mitsumasa Koyanagi
  • Organizer: Advanced Metallization Conference (AMC) 2008
  • Place of Presentation: サンディエゴ(米国)
  • Year and Date: 2008-09-23
• [Presentation] 三次元LSIを搭載した光インターポーザのためのテーパTSVの形成 (2008)
  • Author(s): 乗木暁博, 藤原誠, 福島誉史, 田中徹, 小柳光正
  • Organizer: 第69回応用物理学会学術講演会
  • Place of Presentation: 春日井
  • Year and Date: 2008-09-02
• [Presentation] キャビティ構造を有するMEMSチップのセルフアセンブリ (2008)
  • Author(s): 今野隆行, 小林吏悟, 福島誉史, 田中徹, 小柳光正
  • Organizer: 第69回応用物理学会学術講演会
  • Place of Presentation: 春日井
  • Year and Date: 2008-09-02
• [Presentation] 三次元LSIを搭載した光インターポーザのためのテーパTSVの形成 (2008)
  • Author(s): 乗木暁博
  • Organizer: 第69回応用物理学会学術講演会
  • Place of Presentation: 春日井市(愛知)
  • Year and Date: 2008-09-02
• [Presentation] キャビティ構造を有するMEMSチップのセルフアセンブリ (2008)
  • Author(s): 今野隆行
  • Organizer: 第69回応用物理学会学術講演会
  • Place of Presentation: 春日井市(愛知)
  • Year and Date: 2008-09-02
• [Presentation] Multichip Self-Assembly Technique on Flexible Polymeric Substrate (2008)
  • Author(s): T. Fukushima, T. Konno, S.Y. Ji, T. Tanaka, M. Koyanagi
  • Organizer: The 59th Electronic Components and Technology Conference (ECTC)
  • Place of Presentation: フロリダ(米国)
  • Year and Date: 2008-05-30
• [Presentation] Multichip SelfAssembly Technique on Flexible Polymeric Substrate (2008)
  • Author(s): Takafumi Fukushima
  • Organizer: The 59 th Electronic Components and Technology Conference (ECTC)
  • Place of Presentation: フロリダ(米国)
  • Year and Date: 2008-05-30
• [Presentation] Chip Self-Assembly Technique for 3D LSI Fabrication (2008)
  • Author(s): T. Fukushima, T. Konno, S.Y. Ji, T. Tanaka, M. Koyanagi
  • Organizer: 3D System Integration Technology Conference (3D-SIC) 2008
  • Place of Presentation: 東京
  • Year and Date: 2008-05-12
• [Presentation] Chip SelfAssembly Technique for 3D LSI Fabrication (2008)
  • Author(s): Takafumi Fukushima
  • Organizer: 3D System Integration Technology Conference (3D-SIC) 2008
  • Place of Presentation: 東京
  • Year and Date: 2008-05-12
• [Presentation] MEMS-半導体横方向配線技術I:フレキシブル基板へのLSIチップのセルフアセンブリ (2008)
  • Author(s): 福島誉史, 今野隆行, 田中徹, 小柳光正
  • Organizer: 第55回応用物理学関係連合講演会
  • Place of Presentation: 船橋
  • Year and Date: 2008-03-28
• [Presentation] MEMS-半導体横方向配線技術I:フレキシブル基板へのLSIチップのセルフアセンブリ (2008)
  • Author(s): 福島誉史
  • Organizer: 第55回応用物理学関係連合講演会
  • Place of Presentation: 日本大学理工学部船橋キャンパス
  • Year and Date: 2008-03-28
• [Presentation] A New Nano-System with Three-Dimensional Structure for Real Time Parallel Image Processing (2008)
  • Author(s): T. Fukushima, M. Koyanagi
  • Organizer: the 5th International Conference on Mechanical Science based on Nanotechnology
  • Place of Presentation: Sendai
  • Year and Date: 2008-03-07
• [Presentation] A New Nano-System with Three-Dimensional Structure for Real Time Parallel Image Processing (2008)
  • Author(s): T. Fukushima
  • Organizer: the 5th International Conference on Mechanical Science based on Nanotechnology
  • Place of Presentation: Sendai International Center, Sendai
  • Year and Date: 2008-03-07
• [Presentation] 3D System Integration Technology and 3D Systems (2008)
  • Author(s): T. Fukushima, T. Tanaka, M. Koyanagi
  • Organizer: Materials for Advanced Metallization Conference 2008 (MAM 2008)
  • Place of Presentation: Dresden(Germany)
  • Year and Date: 2008-03-03
• [Presentation] 3D System Integration Technology and 3D Systems (2008)
  • Author(s): T. Fukushima
  • Organizer: Materials for Advanced Metallization Conference 2008 (MAM 2008)
  • Place of Presentation: Dresden, Germany
  • Year and Date: 2008-03-03
• [Presentation] 自己組織化ウェーハ張り合わせによる三次元集積化技術 (2008)
  • Author(s): 福島誉史, 田中徹, 小柳光正
  • Organizer: 応用物理学会シリコンテクノロジー分科会多層配線システム研究委員会(共催:電子情報通信学会、シリコン材料・デバイス研究会(SDM)
  • Place of Presentation: 東京
  • Year and Date: 2008-02-08
• [Presentation] 自己組織化ウェーハ張り合わせによる三次元集積化技術 (2008)
  • Author(s): 福島誉史
  • Organizer: 応用物理学会シリコンテクノロジー分科会多層配線システム研究委員会(共催:電子情報通信学会、シリコン材料・デバイス研究会(SDM)
  • Place of Presentation: 機械振興会館,東京
  • Year and Date: 2008-02-08
• [Presentation] New Three-Dimensional Integration Technology Based on Reconfigured Wafer-on-Wafer Bonding Technique (2007)
  • Author(s): Takafumi. Fukushima, Hirokazu Kikuchi, Yusuke Yamada, Takayuki Konno, Jun Liang, Keiichi Sasaki, Kiyoshi Inamura, Tetsu Tanaka, Mitsumasa Koyanagi
  • Organizer: International Electron Devices Meeting (IEDM)
  • Place of Presentation: Washington DC(USA)
  • Year and Date: 2007-12-12
• [Presentation] New Three-Dimensional Integration Technology Based on Reconfigured Wafer-on-Wafer Bonding Technique (2007)
  • Author(s): Takafumi Fukushima
  • Organizer: International Electron Devices Meeting (IEDM)
  • Place of Presentation: Washington DC, USA
  • Year and Date: 2007-12-12
• [Presentation] 3次元実装技術 (2007)
  • Author(s): 福島誉史, 田中徹, 小柳光正
  • Organizer: エレクトロニクス実装学会/材料技術委員会公開研究会「次世代インテリジェント実装材料」
  • Place of Presentation: 東京
  • Year and Date: 2007-11-29
• [Presentation] 3次元実装技術 (2007)
  • Author(s): 福島 誉史
  • Organizer: エレクトロニクス実装学会/材料技術委員会公開研究会「次世代インテリジェント実装材料」
  • Place of Presentation: 東京,国立オリンピック記念青少年総合センター
  • Year and Date: 2007-11-29
• [Presentation] Chip-to-Wafer Stacking for 3D Integration with TSV (2007)
  • Author(s): Takafumi Fukushima, Tetsu Tanaka, Mitsumasa Koyanagi
  • Organizer: 1st International IEEE Workshop on Low Temperature Bonding for 3D Integration
  • Place of Presentation: Tokyo
  • Year and Date: 2007-11-09
• [Presentation] Chip-to-Wafer Stacking for 3D Integration with TSV (2007)
  • Author(s): T. Fukushima
  • Organizer: 1st International IEEE Workshop on Low Temperature Bonding for 3D Integration
  • Place of Presentation: Tokyo Univ. Tokyo
  • Year and Date: 2007-11-09
• [Presentation] Thermal Issues of 3D ICs (2007)
  • Author(s): Takafumi Fukushima, Tetsu Tanaka, Mitsumasa Koyanagi
  • Organizer: Workshop on Driving the future of interconnect in 3D: Thermal and Design Issues in 3D ICs
  • Place of Presentation: Albany (USA)
  • Year and Date: 2007-10-11
• [Presentation] Thermal Issues of 3D ICs (2007)
  • Author(s): T. Fukushima
  • Organizer: Workshop on Driving the future of interconnect in 3D: Thermal and Design Issues in 3D ICs
  • Place of Presentation: Albany, New York, USA
  • Year and Date: 2007-10-11
• [Presentation] Self-Assembly Process for Chip-to-Wafer Three-Dimensional Integration (2007)
  • Author(s): T. Fukushima, Y. Yamada, H. Kikuchi, T. Tanaka, M. Koyanagi
  • Organizer: 57th Electronic Components and Technology Conference (ECTC)
  • Place of Presentation: Reno (USA)
  • Year and Date: 2007-05-31
• [Presentation] Self-Assembly Process for Chip-to-Wafer Three-Dimensional Integration (2007)
  • Author(s): T. Fukushima
  • Organizer: 57th Electronic Components and Technology Conference (ECTC)
  • Place of Presentation: Reno, Nevada, USA
  • Year and Date: 2007-05-31
• [Book] MEMS/NEMS工学大全(執筆担当部分:第8節 "高密度三次元実装技術") (2009)
  • Author(s): 福島誉史
  • Publisher: テクノシステム(初版発行)
• [Book] M&E(自己組織化によるウェハレベル三次元集積化技術, 36(1)) (2009)
  • Author(s): 福島誉史, 田中徹, 小柳光正
• [Book] MEMS/NEMS工学大会(第8節 p.455-p.463) (2009)
  • Author(s): 福島誉史
  • Total Pages: 9
  • Publisher: テクノシステム
• [Book] M&E (2009)
  • Author(s): 福島誉史
  • Total Pages: 3
  • Publisher: 工業調査会
• [Remarks] 2010年2月ドイツ・イノベーション・アワード「ゴットフリード・ワグネル賞2009」the 2nd Prize
• [Remarks] 2008年12月Material Research Society (MRS) fall meeting Invited Speaker Award
• [Remarks] 2008年2月財団法人青葉工学振興会第13回研究奨励賞
• [Remarks] 2007年4月International Conference on Electronics Packaging / Outstanding Technical Paper Award
• [Remarks]
  • URL: http://www.sd.mech.tohoku.ac.jp/
• [Remarks]
  • URL: http://www.sd.mech.tohoku.ac.jp/
• [Patent(Industrial Property Rights)] 自己組織化機能を用いた三次元集積回路の製造方法及び製造装置 (2009)
  • Inventor(s): 小柳光正, 福島誉史, 杉山雅彦
  • Industrial Property Rights Holder: 東北大学, 東京エレクトロン
  • Industrial Property Number: 2009-095241
  • Filing Date: 2009-04-06
• [Patent(Industrial Property Rights)] 自己組織化機能を用いた三次元集積回路の製造方法 (2009)
  • Inventor(s): 小柳光正, 福島誉史, 杉山雅彦
  • Industrial Property Rights Holder: 東北大学, 東京エレクトロン
  • Industrial Property Number: 2009-070769
  • Filing Date: 2009-03-23
• [Patent(Industrial Property Rights)] 一括保持トレイ及び三次元集積回路製造装 (2009)
  • Inventor(s): 小柳光正、福島誉史、杉山雅彦
  • Industrial Property Rights Holder: 東京エレクトロン株式会社
  • Industrial Property Number: 2009-095241
  • Filing Date: 2009-04-06