| Budget Amount *help |
¥17,160,000 (Direct Cost: ¥13,200,000、Indirect Cost: ¥3,960,000)
Fiscal Year 2023: ¥1,690,000 (Direct Cost: ¥1,300,000、Indirect Cost: ¥390,000)
Fiscal Year 2022: ¥1,690,000 (Direct Cost: ¥1,300,000、Indirect Cost: ¥390,000)
Fiscal Year 2021: ¥1,690,000 (Direct Cost: ¥1,300,000、Indirect Cost: ¥390,000)
Fiscal Year 2020: ¥5,330,000 (Direct Cost: ¥4,100,000、Indirect Cost: ¥1,230,000)
Fiscal Year 2019: ¥6,760,000 (Direct Cost: ¥5,200,000、Indirect Cost: ¥1,560,000)
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| Outline of Final Research Achievements |
We derived that the noise CNN is equivalent to the existing CNN. We designed a dedicated circuit for noise CNN and implemented an FPGA prototype. We investigated a noise generation circuit suitable for a configuration that combines a noise generation circuit and 1×1 size convolution, and implemented the circuit. We demonstrated the superiority of the proposed method compared to GPU. We further improved the performance of the noisy CNN circuit by applying existing parameter reduction methods such as bit reduction and pruning. Since noise convolution is equivalent to existing convolution, we showed that it can be combined with existing methods. We also constructed an FPGA cluster environment to speed up the learning of noisy CNNs, and investigated the learning method for noisy CNNs.
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