Machine learning driven system level heterogeneous memory management for high-performance computing
| Project/Area Number |
19K11993
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| Research Category |
Grant-in-Aid for Scientific Research (C)
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| Allocation Type | Multi-year Fund |
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| Section | 一般 |
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| Review Section |
Basic Section 60090:High performance computing-related
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| Research Institution | Institute of Physical and Chemical Research |
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Principal Investigator |
GEROFI BALAZS 国立研究開発法人理化学研究所, 計算科学研究センター, 上級研究員 (70633501)
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| Project Period (FY) |
2019-04-01 – 2023-03-31
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| Project Status |
Discontinued (Fiscal Year 2022)
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| Budget Amount *help |
¥4,290,000 (Direct Cost: ¥3,300,000、Indirect Cost: ¥990,000)
Fiscal Year 2021: ¥1,300,000 (Direct Cost: ¥1,000,000、Indirect Cost: ¥300,000)
Fiscal Year 2020: ¥2,080,000 (Direct Cost: ¥1,600,000、Indirect Cost: ¥480,000)
Fiscal Year 2019: ¥910,000 (Direct Cost: ¥700,000、Indirect Cost: ¥210,000)
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| Keywords | Memory access tracing / Runtime approximation / Distributed ML / Neural network training / I/O of deep learning / Distributed learning / Memory access tracking / heterogeneous memory / gem5 / architectural simulator / non-uniform memory / machine learning / reinforcement learning / long-short term memory / transformer attention / Memory management / Machine learning / HPC |
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| Outline of Research at the Start |
This research studies the combination of system software level mechanisms with machine learning driven policies for heterogeneous memory management in high-performance computing. It involves automatic discovery and characterization of memory devices, online application profiling based on hardware performance counters, machine learning driven decision processes for data management, and transparent, operating system level data movement.
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| Outline of Annual Research Achievements |
Results have been achieved in two parallel efforts of the project.
We found that system-software-level heterogeneous memory management solutions utilizing machine learning, in particular nonsupervised learning- based methods such as reinforcement learning, require rapid estimation of execution runtime as a function of the data layout across memory devices for exploring different data placement strategies, which renders architecture-level simulators impractical for this purpose. We proposed a differential tracing-based approach using memory access traces obtained by high-frequency sampling-based methods (e.g., Intel's PEBS) on real hardware using of different memory devices. We developed a runtime estimator based on such traces that provides an execution time estimate orders of magnitude faster than full-system simulators. On a number of HPC mini applications we showed that the estimator predicts runtime with an average error of 4.4% compared to measurements on real hardware.
For the deep learning data shuffling subtopic, we investigated the viability of partitioning the dataset among DL workers and performing only a partial distributed exchange of samples in each training epoch. Through extensive experiments on up to 2048 GPUs of ABCI and 4096 compute nodes of Fugaku, we demonstrated that in practice validation accuracy of global shuffling can be maintained when carefully tuning the partial distributed exchange. We provided an implementation in PyTorch that enables users to control the proposed data exchange scheme.
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Report
(4 results)
Research Products
(8 results)
