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A Study on Processor Architectures that are tolerable to Soft-error, Process variation, and Aging.

Research Project

Project/Area Number 20300019
Research Category

Grant-in-Aid for Scientific Research (B)

Allocation TypeSingle-year Grants
Section一般
Research Field Computer system/Network
Research InstitutionFukuoka University

Principal Investigator

SATO Toshinori  Fukuoka University, 工学部, 教授 (00322298)

Co-Investigator(Kenkyū-buntansha) HAYASHIDA Takanori  福岡大学, 工学部, 助教 (00380551)
Project Period (FY) 2008 – 2010
Project Status Completed (Fiscal Year 2010)
Budget Amount *help
¥15,730,000 (Direct Cost: ¥12,100,000、Indirect Cost: ¥3,630,000)
Fiscal Year 2010: ¥4,940,000 (Direct Cost: ¥3,800,000、Indirect Cost: ¥1,140,000)
Fiscal Year 2009: ¥4,550,000 (Direct Cost: ¥3,500,000、Indirect Cost: ¥1,050,000)
Fiscal Year 2008: ¥6,240,000 (Direct Cost: ¥4,800,000、Indirect Cost: ¥1,440,000)
Keywordsディペンダブル / 省エネルギー / 低消費電力 / システムオンチップ / 計算機システム
Research Abstract

Semiconductor LSI technologies has been improved for decades. Smart phones are the representative, which benefit from the improvement. However, unfortunately, serious problems areemerging. Since transistors are much shrunken, their reliability is severely degraded. Hence, IT devices utilizing such transistors also become unreliable. This study attacks the problems. For some cases, the degradation in transistors is reduced by 70%.

Report

(4 results)
  • 2010 Annual Research Report   Final Research Report ( PDF )
  • 2009 Annual Research Report
  • 2008 Annual Research Report
  • Research Products

    (43 results)

All 2011 2010 2009 2008 Other

All Journal Article (6 results) (of which Peer Reviewed: 6 results) Presentation (30 results) Remarks (7 results)

  • [Journal Article] Short Term Cell-flipping Technique for Mitigating SNM Degradation Due to NBTI2011

    • Author(s)
      Yuji Kunitake, Toshinori Sato, Hiroto Yasuura
    • Journal Title

      IEICE Transactions on Electronics Vol.E94-C, No.4

      Pages: 520-529

    • NAID

      10029505483

    • Related Report
      2010 Final Research Report
    • Peer Reviewed
  • [Journal Article] Enhancements of a Circuit-Level Timing Speculation Technique and Their Evaluations Using a Co-simulation Environment2009

    • Author(s)
      Yuji Kunitake, Kazuhiro Mima, Toshinori Sato, Hiroto Yasuura
    • Journal Title

      IEICE Transactions on Electronics Vol.E92-C, No.4

      Pages: 483-491

    • NAID

      10026821649

    • Related Report
      2010 Final Research Report
    • Peer Reviewed
  • [Journal Article] Enhancements of a Circuit-Level Timing Speculation Technique and Theit Evaluations Using a Co-simulation Environment2009

    • Author(s)
      Yuji Kunitake
    • Journal Title

      IRICE Transactions on Electronics E92C(4)

      Pages: 483-491

    • Related Report
      2009 Annual Research Report
    • Peer Reviewed
  • [Journal Article] Enhancements of a Circuit-level Timing Speculation Technique and their Evaluations Using a Co-simulation Environment2009

    • Author(s)
      Yuji Kunitake
    • Journal Title

      IEICE Transactions on Electronics E92C(4)

      Pages: 483-491

    • Related Report
      2008 Annual Research Report
    • Peer Reviewed
  • [Journal Article] タイミング歩留まり改善を目的とする演算カスケーディング2008

    • Author(s)
      渡辺慎吾,橋本昌宜,佐藤寿倫
    • Journal Title

      情報処理学会論文誌コンピューティングシステム Vol.1, No.2

      Pages: 12-21

    • NAID

      110007990169

    • Related Report
      2010 Final Research Report
    • Peer Reviewed
  • [Journal Article] タイミング歩留まり改善を目的とする演算カスケーディング2008

    • Author(s)
      渡辺慎吾
    • Journal Title

      情報処理学会論文誌 : コンピューティングシステム 1(2)

      Pages: 12-21

    • Related Report
      2008 Annual Research Report
    • Peer Reviewed
  • [Presentation] Hitting Pollack's Law for Improving MPSoC Programmability and Efficiency2011

    • Author(s)
      Toshinori Sato, Hideki Mori, Rikiya Yano, Takanori Hayashida
    • Organizer
      3rd Workshop on Designing for Embedded Parallel Computing Platforms : Architectures, Design Tools, and Applications(査読有,2 pages)
    • Place of Presentation
      グルノーブル(フランス)
    • Year and Date
      2011-03-18
    • Related Report
      2010 Final Research Report
  • [Presentation] Hitting Pollack's Law for Improving MPSoC Programmability and Efficiency2011

    • Author(s)
      Toshinori Sato
    • Organizer
      3^<rd> Workshop on Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools and Applications
    • Place of Presentation
      グルノーブル(フランス)
    • Year and Date
      2011-03-18
    • Related Report
      2010 Annual Research Report
  • [Presentation] タイミングエラー予報FFを利用するマルチコアプロセッサのパワーマネージメント2011

    • Author(s)
      吉木崇人,佐藤寿倫,林田隆則
    • Organizer
      情報処理学会九州支部火の国情報シンポジウム(査読無,6頁)
    • Place of Presentation
      福岡
    • Year and Date
      2011-03-08
    • Related Report
      2010 Final Research Report
  • [Presentation] チップ面積制約下におけるマルチコア化による性能改善要件の調査2011

    • Author(s)
      小林哲也,佐藤寿倫,林田隆則
    • Organizer
      情報処理学会九州支部火の国情報シンポジウム(査読無,5頁)
    • Place of Presentation
      福岡
    • Year and Date
      2011-03-08
    • Related Report
      2010 Final Research Report
  • [Presentation] 構成可変コアによるシングルコア・プロセッサの性能改善検討2011

    • Author(s)
      矢野力也,森英貴,佐藤寿倫,林田隆則
    • Organizer
      情報処理学会九州支部火の国情報シンポジウム(査読無,6頁)
    • Place of Presentation
      福岡
    • Year and Date
      2011-03-08
    • Related Report
      2010 Final Research Report
  • [Presentation] タイミングエラー予報FFを利用するマルチコアプロセッサのパワーマネージメント2011

    • Author(s)
      吉木崇人
    • Organizer
      情報処理学会九州支部火の国情報シンポジウム
    • Place of Presentation
      福岡大学(福岡県)
    • Year and Date
      2011-03-08
    • Related Report
      2010 Annual Research Report
  • [Presentation] チップ面積制約下におけるマルチコア化による性能改善要件の調査2011

    • Author(s)
      小林哲也
    • Organizer
      情報処理学会九州支部火の国情報シンポジウム
    • Place of Presentation
      福岡大学(福岡県)
    • Year and Date
      2011-03-08
    • Related Report
      2010 Annual Research Report
  • [Presentation] 構成可変コアによるシングルコア・プロセッサの性能改善検討2011

    • Author(s)
      矢野力也
    • Organizer
      情報処理学会九州支部火の国情報シンポジウム
    • Place of Presentation
      福岡大学(福岡県)
    • Year and Date
      2011-03-08
    • Related Report
      2010 Annual Research Report
  • [Presentation] Possibilities to Miss Predicting Timing Errors in Canary Flip-flops2011

    • Author(s)
      Yuji Kunitake, Toshinori Sato, Hiroto Yasuura, Takanori Hayashida
    • Organizer
      54th IEEE International Midwest Symposium on Circuits and Systems(査読有)
    • Place of Presentation
      ソウル(韓国)(発表予定)
    • Related Report
      2010 Final Research Report
  • [Presentation] A Selective Replacement Method for Timing-Error-Predicting Flip-Flops2011

    • Author(s)
      Yuji Kunitake, Toshinori Sato, Hiroto Yasuura, Takanori Hayashida
    • Organizer
      54th IEEE International Midwest Symposium on Circuits and Systems(査読有)
    • Place of Presentation
      ソウル(韓国)(発表予定)
    • Related Report
      2010 Final Research Report
  • [Presentation] Multicore Power Management Utilizing Error-Predicting Flip-flop2011

    • Author(s)
      Toshinori Sato, Takahito Yoshiki, Takanori Hayashida
    • Organizer
      4th International Workshop on Multi-Core Computing Systems(査読有)
    • Place of Presentation
      ソウル(韓国)(発表予定)
    • Related Report
      2010 Final Research Report
  • [Presentation] A Replacement Strategy for Canary Flip-Flops2010

    • Author(s)
      Yuji Kunitake, Toshinori Sato, Hiroto Yasuura
    • Organizer
      16th IEEE Pacific Rim International Symposium on Dependable Computing(査読無,pp.227-228)
    • Place of Presentation
      東京
    • Year and Date
      2010-12-15
    • Related Report
      2010 Final Research Report
  • [Presentation] A Replacement Strategy for Canary Flip-Flops2010

    • Author(s)
      Toshinori Sato
    • Organizer
      16^<th> IEEE Pacific Rim International Symposium on Dependable Computing
    • Place of Presentation
      国立情報学研究所(東京都)
    • Year and Date
      2010-12-15
    • Related Report
      2010 Annual Research Report
  • [Presentation] MultiCore Energy Reduction Utilizing Canary FF2010

    • Author(s)
      Yoshimi Otsuka, Toshinori Sato, Takahito Yoshiki, Takanori Hayashida
    • Organizer
      10th International Symposium on Communications and Information Technologies(査読有,pp.922-927)
    • Place of Presentation
      東京
    • Year and Date
      2010-10-29
    • Related Report
      2010 Final Research Report
  • [Presentation] MultiCore Energy Reduction Utilizing Canary FF2010

    • Author(s)
      Toshinori Sato
    • Organizer
      10^<th> International Symposium on Communications and Information Technologies
    • Place of Presentation
      明治大学(東京都)
    • Year and Date
      2010-10-29
    • Related Report
      2010 Annual Research Report
  • [Presentation] ストレス確率を考慮したSRAMの値反転によるNBTI劣化抑制手法2010

    • Author(s)
      國武勇次,佐藤寿倫,安浦寛人
    • Organizer
      DAシンポジウム(査読有,pp.129-134)
    • Place of Presentation
      豊橋
    • Year and Date
      2010-09-03
    • Related Report
      2010 Final Research Report
  • [Presentation] ストレス確率を考慮したSRAMの値反転によるNBTI劣化抑制手法2010

    • Author(s)
      国武勇次
    • Organizer
      DAシンポジウム
    • Place of Presentation
      ホテル目航豊橋(愛知県)
    • Year and Date
      2010-09-03
    • Related Report
      2010 Annual Research Report
  • [Presentation] A Case Study of Short Term Cell-Flipping Technique for Mitigating NBTI Degradation on Cache2010

    • Author(s)
      Yuji Kunitake, Toshinori Sato, Hiroto Yasuura
    • Organizer
      2nd Asia Symposium on Quality Electronic Design(査読有,pp.301-307)
    • Place of Presentation
      ペナン(マレーシア)
    • Year and Date
      2010-08-04
    • Related Report
      2010 Final Research Report
  • [Presentation] A Case Study of Short Term Cell-Flipping Technique for Mitigating NBTI Degradation on Cache2010

    • Author(s)
      Yuji Kunitake
    • Organizer
      2nd Asia Symposium on Quality Electronic Design
    • Place of Presentation
      ペナン(マレーシア)
    • Year and Date
      2010-08-04
    • Related Report
      2010 Annual Research Report
  • [Presentation] Signal Probability Control for Relieving NBTI in SRAM Cells2010

    • Author(s)
      Yuji Kunitake, Toshinori Sato, Hiroto Yasuura
    • Organizer
      11th International Symposium on Quality Electronic Design(査読有,pp.660-666)
    • Place of Presentation
      サンノゼ(アメリカ)
    • Year and Date
      2010-03-24
    • Related Report
      2010 Final Research Report
  • [Presentation] Signal Probability Control for Relieving NBTI in SRAM Cells2010

    • Author(s)
      Yuji Kunitake
    • Organizer
      11^<th> International Symposium on Quality Electronic Design
    • Place of Presentation
      San Jose
    • Year and Date
      2010-03-24
    • Related Report
      2009 Annual Research Report
  • [Presentation] Uncriticality-directed Scheduling for Tackling Variation and Power Challenges2009

    • Author(s)
      Toshinori Sato, Shingo Watanabe
    • Organizer
      10th International Symposium on Quality Electronic Design(査読有,pp.820-825)
    • Place of Presentation
      サンノゼ(アメリカ)
    • Year and Date
      2009-03-18
    • Related Report
      2010 Final Research Report
  • [Presentation] Uncriticality-directed Scheduling for Tackling Variation and Power Challenses2009

    • Author(s)
      Toshinori Sato
    • Organizer
      10th International Symposium on Quality Electronic Design
    • Place of Presentation
      San Jose
    • Year and Date
      2009-03-18
    • Related Report
      2008 Annual Research Report
  • [Presentation] A Case for Exploiting Complex Arithmetic Circuits towards Performance Yield Enhancement2009

    • Author(s)
      Shingo Watanabe, Masanori Hashimoto, Toshinori Sato
    • Organizer
      10th International Symposium on Quality Electronic Design(査読有,pp.401-407)
    • Place of Presentation
      サンノゼ(アメリカ)
    • Year and Date
      2009-03-17
    • Related Report
      2010 Final Research Report
  • [Presentation] タイミングエラーの予報を目的とするカナリアFFの挿入位置限定2008

    • Author(s)
      国武勇次,佐藤寿倫,山口誠一朗,安浦寛人
    • Organizer
      電子情報通信学会技術研究報告(査読無,VLD2008-60-90,Vol.108, No.298,pp.85-89)
    • Place of Presentation
      北九州
    • Year and Date
      2008-11-17
    • Related Report
      2010 Final Research Report
  • [Presentation] Mitigating Performance Loss in Aggressive DVS Using Dual-Sensing Flip-Flops2008

    • Author(s)
      Yuji Kunitake, Toshinori Sato, Hiroto Yasuura
    • Organizer
      16th IFIP/IEEE International Conference on Very Large Scale Integration(査読有,pp.543-546)
    • Place of Presentation
      ロードス島(ギリシャ)
    • Year and Date
      2008-10-15
    • Related Report
      2010 Final Research Report
  • [Presentation] Formulating MITF for a Multicore Processor with SEU Tolerance2008

    • Author(s)
      Toshimasa Funaki, Toshinori Sato
    • Organizer
      11th Euromicro Conference on Digital System Design(査読有,Vol.1,pp.234-241)
    • Place of Presentation
      パルマ(イタリア)
    • Year and Date
      2008-09-03
    • Related Report
      2010 Final Research Report
  • [Presentation] Cascading Dependent Operations for Mitigating Timing Variability2008

    • Author(s)
      Shingo Watanabe, Masanori Hashimoto, Toshinori Sato
    • Organizer
      Workshop on Quality-Aware Design(査読有,8 pages)
    • Place of Presentation
      北京(中国)
    • Year and Date
      2008-06-21
    • Related Report
      2010 Final Research Report
  • [Presentation] タイミング歩留まり改善を目的とする演算器カスケーディング2008

    • Author(s)
      渡辺慎吾,橋本昌宜,佐藤寿倫
    • Organizer
      先進計算基盤シテムシポジウム(査読有,pp.115-122)
    • Place of Presentation
      つくば
    • Year and Date
      2008-06-12
    • Related Report
      2010 Final Research Report
  • [Presentation] カナリア方式におけるタイミングエラー見逃しに関する調査2008

    • Author(s)
      国武勇次,佐藤寿倫,安浦寛人
    • Organizer
      先進的計算基盤システムシンポジウム(査読有,pp.48-49)
    • Place of Presentation
      つくば
    • Year and Date
      2008-06-11
    • Related Report
      2010 Final Research Report
  • [Remarks] ホームページ等

    • URL

      http://uarch.jimdo.com/

    • Related Report
      2010 Final Research Report
  • [Remarks]

    • URL

      http://www.cis.fukuoka-u.ac.jp/~tsato/

    • Related Report
      2010 Annual Research Report
  • [Remarks]

    • URL

      http://resweb2.jhk.adm.fukuoka-u.ac.jp/FukuokaUnivHtml/info/4899/R107J.html

    • Related Report
      2010 Annual Research Report
  • [Remarks]

    • URL

      http://www.cis.fukuoka-u.ac.jp/~tsato/

    • Related Report
      2009 Annual Research Report
  • [Remarks]

    • URL

      http://resweb2.jhk.adm.fukuoka-u.ac.jp/FukuokaUnivHtml/info/4899/R107J.html

    • Related Report
      2009 Annual Research Report
  • [Remarks]

    • URL

      http://www.cis.fukuoka-u.ac.jp/~tsato/

    • Related Report
      2008 Annual Research Report
  • [Remarks]

    • URL

      http://resweb2.jhk.adm.fukuoka-u.ac.jp/FukuokaUnivHtml/info/4899/R107J.html

    • Related Report
      2008 Annual Research Report

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Published: 2008-04-01   Modified: 2016-04-21  

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