High Performance Silicon On-chip Antenna Using Metamaterials
| Project/Area Number |
20360148
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| Research Category |
Grant-in-Aid for Scientific Research (B)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
Electron device/Electronic equipment
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| Research Institution | Hokkaido University |
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Principal Investigator |
SANO Eiichi Hokkaido University, 量子集積エレクトロニクス研究センター, 教授 (10333650)
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| Co-Investigator(Kenkyū-buntansha) |
IKEBE Masayuki 北海道大学, 大学院・情報科学研究科, 准教授 (20374613)
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| Project Period (FY) |
2008 – 2010
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| Project Status |
Completed (Fiscal Year 2010)
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| Budget Amount *help |
¥18,720,000 (Direct Cost: ¥14,400,000、Indirect Cost: ¥4,320,000)
Fiscal Year 2010: ¥4,030,000 (Direct Cost: ¥3,100,000、Indirect Cost: ¥930,000)
Fiscal Year 2009: ¥7,020,000 (Direct Cost: ¥5,400,000、Indirect Cost: ¥1,620,000)
Fiscal Year 2008: ¥7,670,000 (Direct Cost: ¥5,900,000、Indirect Cost: ¥1,770,000)
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| Keywords | メタマテリアル / 負屈折率 / 磁気壁 / アンテナ / RFCMOS / 無線通信回路 / RF CMOS / 複合材料 |
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| Research Abstract |
On-chip antennas are demanded to further lower the cost of wireless CMOS ICs. The low resistivity of silicon substrates is a major obstacle to fabricate high-gain on-chip antennas. We placed an artificial dielectric layer (ADL) between an antenna and Si substrate to improve the antenna gain. A half-wave dipole-antenna that has ADL was designed and fabricated using a CMOS-compatible process with one poly-Si and two metal layers. Using the ADL enhanced gain by 3-dB. The measured gain was the highest ever achieved for the antennas operating at around 10 GHz on low-resistivity Si substrates. A method for further improvement is discussed. In addition to the improved antenna, we investigated wireless communication circuits monolithically integrated with antenna and nano-carbon materials for electromagnetic shielding applications.
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Report
(4 results)
Research Products
(40 results)
