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Quantum Circuit Design using Matrix Decomposition and its application

Research Project

Project/Area Number 20500024
Research Category

Grant-in-Aid for Scientific Research (C)

Allocation TypeSingle-year Grants
Section一般
Research Field Fundamental theory of informatics
Research InstitutionNTT Communication Science Laboratories

Principal Investigator

河野 泰人  NTT Communication Science Laboratories, 人間情報研究部, 主任研究員 (40396180)

Co-Investigator(Kenkyū-buntansha) 関川 浩  東海大学, 理学部, 准教授 (00396178)
山下 茂  立命館大学, 情報理工学部, 教授 (30362833)
中西 正樹  山形大学, 地域教育文化学部, 准教授 (40324967)
Project Period (FY) 2008 – 2010
Project Status Completed (Fiscal Year 2010)
Budget Amount *help
¥4,160,000 (Direct Cost: ¥3,200,000、Indirect Cost: ¥960,000)
Fiscal Year 2010: ¥1,300,000 (Direct Cost: ¥1,000,000、Indirect Cost: ¥300,000)
Fiscal Year 2009: ¥1,300,000 (Direct Cost: ¥1,000,000、Indirect Cost: ¥300,000)
Fiscal Year 2008: ¥1,560,000 (Direct Cost: ¥1,200,000、Indirect Cost: ¥360,000)
Keywords量子計算理論 / 量子回路設計 / 行列分解 / パターンマッチング / Linear Nearest Neighbor / 隣接互換グラフ / Steane符号 / SATアルゴリズム / 量子プッシュダウンオートマトン / 離散対数問題 / 量子回路の等価性判定 / Mutually Unbiased Basis / 複素アダマール行列 / 多準位量子ゲート / Cosine-Sine分解
Research Abstract

We proposed the following algorithms and applications: 1) Efficient quantum algorithms for the extended Clifford group and its application to the discrete logarithm problem. 2) An efficient matrix decomposition algorithm. 3) A matrix decomposition algorithm that constructs efficient quantum circuit on qudits. 4) An efficient equivalence checking algorithm of quantum circuits. 5) DDMF, a quantum version of BDD, and its application to constructing large-scale quantum circuits. 6) A new result about computational complexity class of quantum pushdown automata. 7) An algorithm that converts normal quantum circuits to efficient quantum circuits on LNN. 8) An efficient algorithm that solves SAT problems using quantum walk.

Report

(4 results)
  • 2010 Annual Research Report   Final Research Report ( PDF )
  • 2009 Annual Research Report
  • 2008 Annual Research Report
  • Research Products

    (45 results)

All 2011 2010 2009 2008 Other

All Journal Article (8 results) (of which Peer Reviewed: 4 results) Presentation (30 results) Remarks (1 results) Patent(Industrial Property Rights) (6 results)

  • [Journal Article] Synthesis of Semi-Classical Quantum Circuits2011

    • Author(s)
      S.Yamashita, S.Minato, D.M.Miller
    • Journal Title

      Journal of Multiple-Valued Logic and Soft Computing Vol.17

      Pages: 99-114

    • Related Report
      2010 Final Research Report
  • [Journal Article] An Efficient Conversion of Quantum Circuits to a Linear Nearest Neighbor Architecture2011

    • Author(s)
      Y.Hirata, M.Nakanishi, S.Yamashita, Y.Nakashima
    • Journal Title

      Quantum Information and Computation vol.11,no.1&2

      Pages: 142-166

    • Related Report
      2010 Final Research Report
  • [Journal Article] An Efficient Conversion of Quantum Circuits to a Linear Nearest Neighbor Architecture2011

    • Author(s)
      Y.Hirata
    • Journal Title

      Quantum Information and Computation

      Volume: Vo1.11 Pages: 142-166

    • Related Report
      2010 Annual Research Report
    • Peer Reviewed
  • [Journal Article] Synthesis of Semi-Classical Quantum Circuits2011

    • Author(s)
      S.Yamashita
    • Journal Title

      Journal of Multiple-Valued Logic and Soft Computing

      Volume: Vol.17 Pages: 99-114

    • Related Report
      2010 Annual Research Report
    • Peer Reviewed
  • [Journal Article] Synthesis of quantum circuits for d-level systems by using Cosine-Sine decomposition2009

    • Author(s)
      Y.Nakajima, Y.Kawano, H.Sekigawa, M.Nakanishi, S.Yamashita, Y.Nakashima
    • Journal Title

      Quantum Information and Computation Vol.9,No.5&6

      Pages: 423-443

    • Related Report
      2010 Final Research Report
  • [Journal Article] Synthesis of quantum circuits for d-level systems by using Cosine-Sine decomposition2009

    • Author(s)
      Y. Nakajima
    • Journal Title

      Quantum Information and Computation (採録決定)

    • Related Report
      2008 Annual Research Report
    • Peer Reviewed
  • [Journal Article] DDMF : An Efficient Decision Diagram Structure for Design Verification of Quantum Circuits under a Practical Restriction2008

    • Author(s)
      S.Yamashita, S.Minato, D.M.Miller
    • Journal Title

      IEICE Trans. Fundamentals Vol.E91-A

      Pages: 3793-3802

    • NAID

      10026854528

    • Related Report
      2010 Final Research Report
  • [Journal Article] DDMF : An Efficient Decision Diagram Structure for Design Verification of Quantum Circuits under a Practical Restriction2008

    • Author(s)
      S. Yamashita
    • Journal Title

      IEICE Trans. Fundamentals Vol.E91-A

      Pages: 3793-3802

    • NAID

      10026854528

    • Related Report
      2008 Annual Research Report
    • Peer Reviewed
  • [Presentation] Hidden Shift Problem for Quadratic Functions on a Product of Cyclic Groups2011

    • Author(s)
      Y.Kawano
    • Organizer
      The 14^<th> Workshop on Quantum Information Processing 2011
    • Place of Presentation
      シンガポール
    • Year and Date
      2011-01-11
    • Related Report
      2010 Annual Research Report 2010 Final Research Report
  • [Presentation] On the weakness of one-way quantum pushdown automata under empty-stack acceptance2011

    • Author(s)
      M.Nakanishi
    • Organizer
      The 14^<th> Workshop on Quantum Information Processing 2011
    • Place of Presentation
      シンガポール
    • Year and Date
      2011-01-10
    • Related Report
      2010 Annual Research Report 2010 Final Research Report
  • [Presentation] Matrix Decomposition and its Application to Complex Hadamard matrices2011

    • Author(s)
      Y.Kawano, H.Sekigawa
    • Organizer
      The 14^<th> Workshop on Quantum Information Processing 2011
    • Place of Presentation
      シンガポール
    • Year and Date
      2011-01-10
    • Related Report
      2010 Annual Research Report 2010 Final Research Report
  • [Presentation] ゲート順序を考慮したLNNアーキテクチャへの変換手法2010

    • Author(s)
      松尾惇士, 山下茂
    • Organizer
      第23回量子情報技術研究会
    • Place of Presentation
      東京大学
    • Year and Date
      2010-11-15
    • Related Report
      2010 Final Research Report
  • [Presentation] ゲート順序を考恵したLNNアーキテクチャへの変換手法2010

    • Author(s)
      松尾惇士
    • Organizer
      第23回量子情報技術研究会
    • Place of Presentation
      東京大学
    • Year and Date
      2010-11-15
    • Related Report
      2010 Annual Research Report
  • [Presentation] A SAT Solver Based on Quantum and Classical Random Walk2010

    • Author(s)
      D.Yokomine, M.Nakanishi, S.Yamashita, Y.Nakashima
    • Organizer
      The 10^<th> Asian Conference on Quantum Information Science 2010(AQIS2010)
    • Place of Presentation
      東京大学
    • Year and Date
      2010-08-29
    • Related Report
      2010 Final Research Report
  • [Presentation] Asymptotics of Quantum Walks on the Line with Phase Parameters2010

    • Author(s)
      M.Villagra, M.Nakanishi, S.Yamashita, Y.Nakashima
    • Organizer
      The 10^<th> Asian Conference on Quantum Information Science 2010(AQIS2010)
    • Place of Presentation
      東京大学
    • Year and Date
      2010-08-29
    • Related Report
      2010 Final Research Report
  • [Presentation] A SAT Solver Based on Quantum and Classical Random Walk2010

    • Author(s)
      D.Yokomine
    • Organizer
      The 10^<th> Asian Conference on Quantum Information Science 2010
    • Place of Presentation
      東京大学
    • Year and Date
      2010-08-29
    • Related Report
      2010 Annual Research Report
  • [Presentation] Asymptotics of Quantum Walks on the Line with Phase Parameters2010

    • Author(s)
      M.Villagra
    • Organizer
      The 10^<th> Asian Conference on Quantum Information Science 2010
    • Place of Presentation
      東京大学
    • Year and Date
      2010-08-29
    • Related Report
      2010 Annual Research Report
  • [Presentation] Synthesis of Semi-Classical Quantum Circuits2010

    • Author(s)
      S.Yamashita, S.Minato, D.M.Miller
    • Organizer
      The 2^<nd> Workshop on Reversible Computation
    • Place of Presentation
      ドイツ
    • Year and Date
      2010-07-03
    • Related Report
      2010 Final Research Report
  • [Presentation] Synthesis of Semi-Classical Quantum Circuits2010

    • Author(s)
      S.Yamashita
    • Organizer
      The 2^<nd> Workshop on Reversible Computation 2010
    • Place of Presentation
      ドイツ
    • Year and Date
      2010-07-03
    • Related Report
      2010 Annual Research Report
  • [Presentation] Fast Equivalence-checking for Quantum Circuits2010

    • Author(s)
      S.Yamashita, I.Markov
    • Organizer
      NANOARCH'10
    • Place of Presentation
      アメリカ
    • Year and Date
      2010-06-16
    • Related Report
      2010 Final Research Report
  • [Presentation] Fast Equivalence-checking for Quantum Circuits2010

    • Author(s)
      S.Yamashita
    • Organizer
      NANOAECH'10
    • Place of Presentation
      アメリカ
    • Year and Date
      2010-06-16
    • Related Report
      2010 Annual Research Report
  • [Presentation] On the Weakness of One-Way Quantum Pushdown Automata2010

    • Author(s)
      M.Nakanishi
    • Organizer
      Fourth International Conference on Quantum, Nano and Micor Technologies(ICQNM2010)
    • Place of Presentation
      St.Maarten., Netherlands Antilles, オランダ
    • Year and Date
      2010-02-11
    • Related Report
      2010 Final Research Report
  • [Presentation] On the Weakness of One-Way Quantum Pushdown Automata2010

    • Author(s)
      Masaki Nakanishi
    • Organizer
      Fourth International Conference on Quantum, Nano and Micor Technologies(ICQNM2010)
    • Place of Presentation
      St.Maarten., Netherlands Antilles(オランダ)
    • Year and Date
      2010-02-11
    • Related Report
      2009 Annual Research Report
  • [Presentation] Application of Matrix Decomposition to Finding Complex Hadamard Matrices2010

    • Author(s)
      Y.Kawano, H.Sekigawa
    • Organizer
      The 13^<th> Workshop on Quantum Information Processing 2010
    • Place of Presentation
      チューリッヒ工科大,スイス
    • Year and Date
      2010-01-20
    • Related Report
      2010 Final Research Report
  • [Presentation] Application of Matrix Decomposition to Finding Complex Hadamard Matrices2010

    • Author(s)
      Yasuhito Kawano
    • Organizer
      Workshop on Quantum Information Processing
    • Place of Presentation
      チューリッヒ工科大(スイス)
    • Year and Date
      2010-01-20
    • Related Report
      2009 Annual Research Report
  • [Presentation] 行列分解と複素アダマール行列への応用2009

    • Author(s)
      河野泰人, 関川浩
    • Organizer
      電子通信学会量子情報技術研究会
    • Place of Presentation
      電気通信大学
    • Year and Date
      2009-11-04
    • Related Report
      2010 Final Research Report 2009 Annual Research Report
  • [Presentation] Adaptive Equivalence-checking for Quantum Circuits2009

    • Author(s)
      山下茂
    • Organizer
      Reed-Muller Workshop 2009
    • Place of Presentation
      那覇
    • Year and Date
      2009-05-24
    • Related Report
      2010 Final Research Report
  • [Presentation] Adaptive Equivalence-checking for Quantum Circuits2009

    • Author(s)
      Yamashita Shigeru
    • Organizer
      Reed-Muller Workshop 2009
    • Place of Presentation
      那霸
    • Year and Date
      2009-05-24
    • Related Report
      2009 Annual Research Report
  • [Presentation] An Efficient Method to Convert Arbitrary Quantum Circuits to Ones on a Linear Nearest Neighbor Architecture, The Third International Conference on Quantum2009

    • Author(s)
      Y.Hirata, M.Nakanishi, S.Yamashita, Y.Nakashima
    • Organizer
      Nano and Micro Technologies
    • Place of Presentation
      Fiesta Americana Condesa Cancun, メキシコ
    • Year and Date
      2009-02-02
    • Related Report
      2010 Final Research Report
  • [Presentation] An Efficient Method to Convert Arbitrary Quantum Circuits to Ones on a Linear Nearest Neighbor Architecture2009

    • Author(s)
      Y. Hirata
    • Organizer
      The Third International Conference on Quantum, Nano and Micro Technologies
    • Place of Presentation
      Fiesta Americana Condesa Cancun (メキシコ)
    • Year and Date
      2009-02-02
    • Related Report
      2008 Annual Research Report
  • [Presentation] Producing quantum circuits of the extended Clifford group2009

    • Author(s)
      Y.Kawano, H.Sekigawa
    • Organizer
      The 12^<th> Workshop on Quantum Information Processing 2009
    • Place of Presentation
      Santa Fe, アメリカ
    • Year and Date
      2009-01-14
    • Related Report
      2010 Final Research Report
  • [Presentation] Producing quantum circuits of the extended Clifford gropu2009

    • Author(s)
      Y. Kawano
    • Organizer
      Quantum Information Processing 2009
    • Place of Presentation
      Santa Fe, New Mexico (アメリカ)
    • Year and Date
      2009-01-14
    • Related Report
      2008 Annual Research Report
  • [Presentation] Efficient Algorithm of the Extended Clifford Group2008

    • Author(s)
      Y.Kawano
    • Organizer
      The 8^<th> Asian conference on Quantum Information and Science 2008
    • Place of Presentation
      KIAS, 韓国
    • Year and Date
      2008-08-28
    • Related Report
      2010 Final Research Report
  • [Presentation] Efficient Algorithm of the Extended Clifford Group2008

    • Author(s)
      Y. Kawano
    • Organizer
      The 8^<th> Asian conference on Quantum Information and Science 2008
    • Place of Presentation
      KIAS, Seoul(韓国)
    • Year and Date
      2008-08-28
    • Related Report
      2008 Annual Research Report
  • [Presentation] An Efficient Verification of Quantum Circuits under a Practical Restriction2008

    • Author(s)
      S.Yamashita, S.Minato, D.M.Miller
    • Organizer
      IEEE 8^<th> International Conference on Computer and Information Technology(CIT2008)
    • Place of Presentation
      University of Technology, オーストラリア
    • Year and Date
      2008-07-08
    • Related Report
      2010 Final Research Report
  • [Presentation] An Efficient Verification of Quantum Circuits under a Practical Restriction2008

    • Author(s)
      S. Minato
    • Organizer
      IEEE 8th International Conference on Computer and Information Technology
    • Place of Presentation
      University of Technology (オーストラリア)
    • Year and Date
      2008-07-08
    • Related Report
      2008 Annual Research Report
  • [Presentation] An Efficient Verification of Quantum Circuits under a Practical Restriction2008

    • Author(s)
      S.Yamashita, S.Minato, D.M.Miller
    • Organizer
      IEEE International Workshop on Logic Synthesis
    • Place of Presentation
      Granlibakken Lodge, アメリカ
    • Year and Date
      2008-06-04
    • Related Report
      2010 Final Research Report
  • [Presentation] Equivalence-checking for Reversible Circuits2008

    • Author(s)
      S. Yamashita
    • Organizer
      IEEE International Workshop on Logic Synthesis
    • Place of Presentation
      Granlibakken Lodge (アメリカ)
    • Year and Date
      2008-06-04
    • Related Report
      2008 Annual Research Report
  • [Remarks] ホームページ等

    • Related Report
      2010 Final Research Report
  • [Patent(Industrial Property Rights)] 量子演算方法,量子演算装置2011

    • Inventor(s)
      河野泰人, 高橋康博, 加藤豪
    • Industrial Property Rights Holder
      NTT
    • Industrial Property Number
      2011-001394
    • Acquisition Date
      2011-01-06
    • Related Report
      2010 Final Research Report
  • [Patent(Industrial Property Rights)] 量子演算方法、量子演算装置2011

    • Inventor(s)
      河野泰人・高橋康博・加藤豪
    • Industrial Property Rights Holder
      NTT
    • Industrial Property Number
      2011-001394
    • Filing Date
      2011-01-06
    • Related Report
      2010 Annual Research Report
  • [Patent(Industrial Property Rights)] 量子演算方法,量子演算装置2010

    • Inventor(s)
      河野泰人, 高橋康博, 加藤豪
    • Industrial Property Rights Holder
      NTT
    • Industrial Property Number
      2010-205566
    • Acquisition Date
      2010-09-14
    • Related Report
      2010 Final Research Report
  • [Patent(Industrial Property Rights)] 量子演算方法、量子演算装置2010

    • Inventor(s)
      河野泰人・高橋康博・加藤豪
    • Industrial Property Rights Holder
      NTT
    • Industrial Property Number
      2010-205566
    • Filing Date
      2010-09-14
    • Related Report
      2010 Annual Research Report
  • [Patent(Industrial Property Rights)] 行列分解装置,行列分解方法及びプログラム2009

    • Inventor(s)
      河野泰人, 関川浩
    • Industrial Property Rights Holder
      NTT
    • Industrial Property Number
      2009-024348
    • Filing Date
      2009-10-22
    • Related Report
      2010 Final Research Report
  • [Patent(Industrial Property Rights)] 行列分解装置、行列分解方法及びプログラム2009

    • Inventor(s)
      河野泰人、関川浩
    • Industrial Property Rights Holder
      NTT
    • Industrial Property Number
      2009-243481
    • Filing Date
      2009-10-22
    • Related Report
      2009 Annual Research Report

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Published: 2008-04-01   Modified: 2016-04-21  

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