| Budget Amount *help |
¥4,680,000 (Direct Cost: ¥3,600,000、Indirect Cost: ¥1,080,000)
Fiscal Year 2010: ¥1,560,000 (Direct Cost: ¥1,200,000、Indirect Cost: ¥360,000)
Fiscal Year 2009: ¥1,430,000 (Direct Cost: ¥1,100,000、Indirect Cost: ¥330,000)
Fiscal Year 2008: ¥1,690,000 (Direct Cost: ¥1,300,000、Indirect Cost: ¥390,000)
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| Research Abstract |
We have developed new methods of synthesizing hardware, from specified parts of ANSI-C programs, which can be called from the other parts of the programs as accelerators. We implemented a prototype of a high-level synthesizer and verified the behavior of the generated hardware on FPGA boards. We have also developed a novel concept of variable scheduling, which enables efficient adaptive execution under the existence of operations whose latencies vary depending on the values of operands or hardware status.
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