• Search Research Projects
  • Search Researchers
  • How to Use
  1. Back to previous page

A Fundamental Study on Hardware Accelerator for SVG

Research Project

Project/Area Number 20500059
Research Category

Grant-in-Aid for Scientific Research (C)

Allocation TypeSingle-year Grants
Section一般
Research Field Computer system/Network
Research InstitutionNational Institute of Informatics

Principal Investigator

YONEDA Tomohiro  National Institute of Informatics, アーキテクチャ科学研究系, 教授 (30182851)

Project Period (FY) 2008 – 2010
Project Status Completed (Fiscal Year 2010)
Budget Amount *help
¥4,550,000 (Direct Cost: ¥3,500,000、Indirect Cost: ¥1,050,000)
Fiscal Year 2010: ¥2,470,000 (Direct Cost: ¥1,900,000、Indirect Cost: ¥570,000)
Fiscal Year 2009: ¥650,000 (Direct Cost: ¥500,000、Indirect Cost: ¥150,000)
Fiscal Year 2008: ¥1,430,000 (Direct Cost: ¥1,100,000、Indirect Cost: ¥330,000)
Keywords非同期式回路設計 / SVG / ハードウェア化 / 非同期式設計
Research Abstract

In this research project, we have investigated a hardware accelerator for SVG, which accepts SVG descriptions as streams, analyzes them directly, and translates them into low-level drawing command sequences based on a concurrent pipelining mechanism. This idea has been implemented as a logic circuit, and it has been functionally tested using a logic simulation tool. Furthermore, in order to decode SVG descriptions efficiently by hardware, a software preprocessor which extracts sets of objects that can be concurrently drawn without affecting the final results has been developed.

Report

(4 results)
  • 2010 Annual Research Report   Final Research Report ( PDF )
  • 2009 Annual Research Report
  • 2008 Annual Research Report
  • Research Products

    (2 results)

All 2010 Other

All Journal Article (2 results) (of which Peer Reviewed: 2 results)

  • [Journal Article] Asynchronous Pipeline Controller Based on Early Acknowledgement Protocol2010

    • Author(s)
      C.Mannakkara, T.Yoneda
    • Journal Title

      電子情報通信学会英文論文誌

      Volume: E93-D,No.8 Pages: 2145-2161

    • NAID

      10027364654

    • Related Report
      2010 Annual Research Report
    • Peer Reviewed
  • [Journal Article] Asynchronous Pipeline Controller Based on Early Acknowledgement Protocol

    • Author(s)
      C.Mannakkara, T.Yoneda
    • Journal Title

      電子情報通信学会英文論文誌 E93-D, No.8

      Pages: 2145-2161

    • NAID

      10027364654

    • Related Report
      2010 Final Research Report
    • Peer Reviewed

URL: 

Published: 2008-04-01   Modified: 2016-04-21  

Information User Guide FAQ News Terms of Use Attribution of KAKENHI

Powered by NII kakenhi