| Budget Amount *help |
¥4,030,000 (Direct Cost: ¥3,100,000、Indirect Cost: ¥930,000)
Fiscal Year 2010: ¥650,000 (Direct Cost: ¥500,000、Indirect Cost: ¥150,000)
Fiscal Year 2009: ¥2,080,000 (Direct Cost: ¥1,600,000、Indirect Cost: ¥480,000)
Fiscal Year 2008: ¥1,300,000 (Direct Cost: ¥1,000,000、Indirect Cost: ¥300,000)
|
|---|
| Research Abstract |
In this research, we have proposed memory architecture that achieves both high performance and low energy consumption, and evaluated it by simulation and actual hardware implementation. The proposed techniques consist of acceleration by functions in a memory controller and energy reduction of cache memories by hardware data compression and software control with special instructions. We confirmed a certain amount of effectiveness from evaluation.
|
