Hardware implementation of the neural computation based on stochastic logic using single flux quantum circuits
Project/Area Number |
20760213
|
Research Category |
Grant-in-Aid for Young Scientists (B)
|
Allocation Type | Single-year Grants |
Research Field |
Electron device/Electronic equipment
|
Research Institution | Tohoku University |
Principal Investigator |
ONOMI Takeshi 東北大学, 電気通信研究所, 助教 (70312676)
|
Project Period (FY) |
2008 – 2010
|
Project Status |
Completed (Fiscal Year 2010)
|
Budget Amount *help |
¥3,380,000 (Direct Cost: ¥2,600,000、Indirect Cost: ¥780,000)
Fiscal Year 2010: ¥1,040,000 (Direct Cost: ¥800,000、Indirect Cost: ¥240,000)
Fiscal Year 2009: ¥1,040,000 (Direct Cost: ¥800,000、Indirect Cost: ¥240,000)
Fiscal Year 2008: ¥1,300,000 (Direct Cost: ¥1,000,000、Indirect Cost: ¥300,000)
|
Keywords | 超伝導素子・材料 / 磁束量子 / ジョセフソン接合 / ニューロ / 集積回路 |
Research Abstract |
Circuits for a hardware neural computation were fabricated by using single flux-quantum circuits based on stochastic logic. In the stochastic logic, the data is represented by a random pulse generation rate for a certain period on time domain. Main components of this neuron circuit are a multiplication of synaptic weight, a generation of membrane potential, and an activation function. These basic elements of the neuron circuit were fabricated. Some main circuits were successfully demonstrated.
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Report
(4 results)
Research Products
(34 results)