Microwave quantum optics with tunable cavity resonators and superconducting qubits
| Project/Area Number |
20F20757
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| Research Category |
Grant-in-Aid for JSPS Fellows
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| Allocation Type | Single-year Grants |
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| Section | 外国 |
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| Review Section |
Basic Section 13020:Semiconductors, optical properties of condensed matter and atomic physics-related
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| Research Institution | The University of Tokyo |
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Principal Investigator |
中村 泰信 東京大学, 大学院工学系研究科(工学部), 教授 (90524083)
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| Co-Investigator(Kenkyū-buntansha) |
CHANG CHUNG WAI SANDBO 東京大学, 大学院工学系研究科(工学部), 外国人特別研究員
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| Project Period (FY) |
2020-07-29 – 2023-03-31
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| Project Status |
Completed (Fiscal Year 2022)
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| Budget Amount *help |
¥2,200,000 (Direct Cost: ¥2,200,000)
Fiscal Year 2022: ¥500,000 (Direct Cost: ¥500,000)
Fiscal Year 2021: ¥900,000 (Direct Cost: ¥900,000)
Fiscal Year 2020: ¥800,000 (Direct Cost: ¥800,000)
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| Keywords | ジョセフソンパラメトリック増幅器 / マイクロ波 / 超伝導 / パラメトリック増幅 / E-beam lithography / air bridge / three-wave mixing / JTWPA / parametric process / low-loss waveguide / multi-qubit readout / quantum state tomography / parametric amplifier / quantum computing |
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| Outline of Research at the Start |
testDevice design: Review of recent parametric amplifications experiments, Theoretical modeling of device with EM simulations, Device layout preparations with CAD tools
Device fabrication: Fabrication and optimization of device parameters, e.g. junction resistance
Device measurement: Comparison with theoretical model and design verification, Performance test, e.g. gain, noise, Integration with qubit measurement, e.g. quantum tomography
Second iteration of fabrication and measurement: Further design optimization, Studying novel parametric processes and applications
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| Outline of Annual Research Achievements |
Throughout this work, we have developed a versatile CAD-assisted circuit design platform and performance estimation tools for designing JTWPAs in different variants, which can reproduce the results of implemented JTWPAs in literatures.
In fabrication, we have been searching for the most suitable Josephson junction design to achieve a high homogeneity in Josephson junction parameters. From the beginning to end of the work, we have reduced the standard deviation (stdev) in junction resistance from over 20% down to 4% in our last measured sample, covering a chip area sufficient for implementing JTWPAs. Our latest junction design to be used in the next batch of JTWPA samples will further reduce the stdev to around 1%, while also greatly improving the junction yield over the previous designs.
From our sample measurements, we have successfully fabricated a low-loss nonlinear transmission line which could act as the basis for JTWPAs. With a comparable electrical length and number of unit cells to JTWPAs in literatures (1413 cells in our sample, comparing to 1000-2000 cells in literatures), we have achieved < 1dB insertion loss comparing to typically 3-6 dB in most other implementations over a similar frequency range. The preliminary measurement results of our samples demonstrated a gain up to an average of 7.5 dB, over a wide bandwidth of 6 GHz. We expect future devices to catch up in terms of gain with more optimized junction and circuit designs.
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| Research Progress Status |
令和4年度が最終年度であるため、記入しない。
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| Strategy for Future Research Activity |
令和4年度が最終年度であるため、記入しない。
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Report
(3 results)
Research Products
(5 results)
