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Study of boron-implanted resistive crystal layers to enhance avalanche ruggedness of ultra-low loss GaN power devices

Research Project

Project/Area Number 20K04590
Research Category

Grant-in-Aid for Scientific Research (C)

Allocation TypeMulti-year Fund
Section一般
Review Section Basic Section 21050:Electric and electronic materials-related
Research InstitutionNational Institute of Advanced Industrial Science and Technology

Principal Investigator

Miura Yoshinao  国立研究開発法人産業技術総合研究所, エネルギー・環境領域, 主任研究員 (90828287)

Co-Investigator(Kenkyū-buntansha) 沈 旭強  国立研究開発法人産業技術総合研究所, エネルギー・環境領域, 上級主任研究員 (50272381)
中島 昭  国立研究開発法人産業技術総合研究所, エネルギー・環境領域, 主任研究員 (60450657)
Project Period (FY) 2020-04-01 – 2023-03-31
Project Status Completed (Fiscal Year 2022)
Budget Amount *help
¥4,290,000 (Direct Cost: ¥3,300,000、Indirect Cost: ¥990,000)
Fiscal Year 2022: ¥1,300,000 (Direct Cost: ¥1,000,000、Indirect Cost: ¥300,000)
Fiscal Year 2021: ¥1,300,000 (Direct Cost: ¥1,000,000、Indirect Cost: ¥300,000)
Fiscal Year 2020: ¥1,690,000 (Direct Cost: ¥1,300,000、Indirect Cost: ¥390,000)
Keywords窒化ガリウム / 縦型パワーデバイス / 高耐圧 / 終端構造 / 電界緩和 / 硼素イオン注入 / イオン注入 / 硼素 / GaNパワーデバイス / 高耐圧化 / 外周構造 / 絶縁化
Outline of Research at the Start

本研究では、縦型GaNパワーデバイス高破壊耐量化のため、硼素イオン注入による絶縁性GaN結晶層を利用した素子設計を提案する。この結晶層を組み込んだpnダイオード構造を試作し、耐圧をはじめとする素子特性評価によって設計の有効性を検証する。これと並行して、硼素イオン注入したp型GaN結晶の電子物性を評価し、絶縁化~高抵抗化のメカニズムを探るとともに、物性の電気的、熱的な安定性を明らかにすることにより、提案する縦型GaNパワーデバイスのプロセス設計指針提示を目指す。

Outline of Final Research Achievements

To enhance avalanche ruggedness of vertical GaN power devices, we investigated resistivity modulation phenomena of boron-implanted p-type epitaxial GaN layers to control acceptor concentration of the p-layer, and studied optimization of junction-termination-extension (JTE) structures using the p-layer. We fabricated vertical pn diodes with the JTE structures on free standing GaN substrates, based on the results of surface conductivity measured for the boron-implanted p-layer and simulated design of the devices. We demonstrated that breakdown voltage for the fabricated devices approached to theoretical value for ideal pn junctions by tuning the boron-implantation conditions. It was also found that the optimized devices showed high avalanche immunity.

Academic Significance and Societal Importance of the Research Achievements

GaNエピ結晶への硼素イオン注入によるpn終端構造の高耐圧化設計は、本研究の実験で性能実証したpnダイオードだけでなく、パワーMOSFETなど他の縦型GaNパワー素子にも適用可能である。提案したプロセスは、比較的良好なプロセス制御性と小さなプロセス負荷を特長としており、電力変換の損失を大幅に低減すると期待される縦型GaNパワー素子の実用化を加速させる可能性があり、社会的意義が大きい。また、硼素元素を含有させたGaN結晶の素子応用はこれまでにほとんど報告されておらず、素子性能の向上および特性の安定性を明らかにした点で、学術的意義がある。

Report

(5 results)
  • 2022 Annual Research Report   Final Research Report ( PDF )
  • 2021 Research-status Report
  • 2020 Research-status Report
  • Products Report
  • Research Products

    (12 results)

All 2023 2022 2021

All Journal Article (4 results) Presentation (5 results) (of which Int'l Joint Research: 4 results) Patent(Industrial Property Rights) (3 results) (of which Overseas: 1 results)

  • [Journal Article] A New JTE Technique for Vertical GaN Power Devices by Conductivity Control Using Boron Implantation into p-Type Layer2022

    • Author(s)
      Miura Yoshinao、Hirai Hirohisa、Nakajima Akira、Harada Shinsuke
    • Journal Title

      Proc. of International Symposium on Power Semiconductor Devices and ICs

      Volume: 2021 Pages: 343-346

    • DOI

      10.23919/ispsd50666.2021.9452219

    • Related Report
      2022 Annual Research Report
  • [Journal Article] Wafer-scale Fabrication of Vertical GaN p-n Diodes with Graded JTE Structures Using Multiple-zone Boron Implantation2022

    • Author(s)
      Miura Yoshinao、Hirai Hirohisa、Nakajima Akira、Harada Shinsuke
    • Journal Title

      Proc. of International Symposium on Power Semiconductor Devices and ICs

      Volume: 2022 Pages: 329-332

    • DOI

      10.1109/ispsd49238.2022.9813654

    • Related Report
      2022 Annual Research Report
  • [Journal Article] Wafer-scale Fabrication of Vertical GaN p-n Diodes with Graded JTE Structures Using Multiple-zone Boron Implantation2022

    • Author(s)
      Yoshinao Miura, Hirohisa Hirai, Akira Nakajima, and Shinsuke Harada
    • Journal Title

      Proc. Int. Symp. Power Semiconductor Devices and IC’(ISPSD))

      Volume: -

    • Related Report
      2021 Research-status Report
  • [Journal Article] A New JTE Technique for Vertical GaN Power Devices by Conductivity Control Using Boron Implantation into p-Type Layer2021

    • Author(s)
      Yoshinao Miura, Hirohisa Hirai, Akira Nakajima, and Shinsuke Harada
    • Journal Title

      Proc. Int. Symp. Power Semiconductor Devices and IC’(ISPSD))

      Volume: - Pages: 354-357

    • Related Report
      2021 Research-status Report 2020 Research-status Report
  • [Presentation] A New JTE Technique for Vertical GaN Power Devices by Conductivity Control Using Boron Implantation into p-Type Layer2022

    • Author(s)
      Y. Miura, H. Hirai, A. Nakajima, and S. Harada
    • Organizer
      ISPSD2021
    • Related Report
      2022 Annual Research Report
    • Int'l Joint Research
  • [Presentation] Wafer-scale Fabrication of Vertical GaN p-n Diodes with Graded JTE Structures Using Multiple-zone Boron Implantation2022

    • Author(s)
      Y. Miura, H. Hirai, A. Nakajima, and S. Harada
    • Organizer
      ISPSD2022
    • Related Report
      2022 Annual Research Report
    • Int'l Joint Research
  • [Presentation] 硼素イオン注入による伝導度制御p型GaNエピ層を用いた縦型素子用JTE構造の設計2022

    • Author(s)
      三浦喜直、平井悠久、中島昭、原田信介
    • Organizer
      第9回先進パワー半導体分科会
    • Related Report
      2022 Annual Research Report
  • [Presentation] Wafer-scale Fabrication of Vertical GaN p-n Diodes with Graded JTE Structures Using Multiple-zone Boron Implantation2022

    • Author(s)
      Yoshinao Miura, Hirohisa Hirai, Akira Nakajima, and Shinsuke Harada
    • Organizer
      Int. Symp. Power Semiconductor Devices and IC’(ISPSD)
    • Related Report
      2021 Research-status Report
    • Int'l Joint Research
  • [Presentation] A New JTE Technique for Vertical GaN Power Devices by Conductivity Control Using Boron Implantation into p-Type Layer2021

    • Author(s)
      Yoshinao Miura, Hirohisa Hirai, Akira Nakajima, and Shinsuke Harada
    • Organizer
      Int. Symp. Power Semiconductor Devices and IC’(ISPSD)
    • Related Report
      2021 Research-status Report 2020 Research-status Report
    • Int'l Joint Research
  • [Patent(Industrial Property Rights)] 半導体装置および半導体装置の製造方法2023

    • Inventor(s)
      三浦喜直、中島昭、沈旭強、平井悠久、原田信介
    • Industrial Property Rights Holder
      国立研究開発法人産業技術総合研究所
    • Industrial Property Rights Type
      特許
    • Industrial Property Number
      2023-515445
    • Filing Date
      2023
    • Related Report
      Products Report
  • [Patent(Industrial Property Rights)] 半導体装置および半導体装置の製造方法2022

    • Inventor(s)
      三浦喜直、中島昭、沈旭強、平井悠久、原田信介
    • Industrial Property Rights Holder
      国立研究開発法人産業技術総合研究所
    • Industrial Property Rights Type
      特許
    • Filing Date
      2022
    • Related Report
      2022 Annual Research Report
    • Overseas
  • [Patent(Industrial Property Rights)] 半導体装置および半導体装置の製造方法2021

    • Inventor(s)
      三浦喜直 中島昭 沈旭強 平井悠久 原田信介
    • Industrial Property Rights Holder
      国立研究開発法人産業技術総合研究所
    • Industrial Property Rights Type
      特許
    • Industrial Property Number
      2021-072595
    • Filing Date
      2021
    • Related Report
      2021 Research-status Report

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Published: 2020-04-28   Modified: 2024-03-28  

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