Development of an Ultra-Fast Statistical Signal/Power Integrity Analysis Simulator for the High-speed Digital System Design
Project/Area Number |
20K14719
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Research Category |
Grant-in-Aid for Early-Career Scientists
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Allocation Type | Multi-year Fund |
Review Section |
Basic Section 21010:Power engineering-related
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Research Institution | Nara Institute of Science and Technology |
Principal Investigator |
Kim Youngwoo 奈良先端科学技術大学院大学, 先端科学技術研究科, 助教 (30862403)
|
Project Period (FY) |
2020-04-01 – 2023-03-31
|
Project Status |
Completed (Fiscal Year 2022)
|
Budget Amount *help |
¥4,160,000 (Direct Cost: ¥3,200,000、Indirect Cost: ¥960,000)
Fiscal Year 2021: ¥2,080,000 (Direct Cost: ¥1,600,000、Indirect Cost: ¥480,000)
Fiscal Year 2020: ¥2,080,000 (Direct Cost: ¥1,600,000、Indirect Cost: ¥480,000)
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Keywords | 半導体パッケージング / 信号と電力の完全性 / 回路シミュレーション / signal/power integrity / high-bandwidth memory / statistical approach / interposer / modeling / Interposer / Modeling / IEEE journal/conference / non-linear noise / analytical modeling |
Outline of Research at the Start |
Recently, due to increase in design complexity and reduced noise margin, signal/power integrity analysis using conventional simulator fails. In this research, we develop extremely fast and accurate signal/power integrity simulator considering various non-linear noises.
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Outline of Final Research Achievements |
Throughout this three-year project, the PI developed a novel SI/PI simulator considering non-linear noise based on mathematic modeling and statistics. As a result, the PI published multiple reviewed international journals (IEEE Transactions) and conferences. Also, the PI has been appointed as an associate editor in IEEE TCPMT (the youngest in the world, the only one from Japan).
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Academic Significance and Societal Importance of the Research Achievements |
PIがこのプロジェクトを通じて開発したシミュレータは、非線形電源/グランドノイズ下でのSI/PI特性を解析するための計算リソースの問題を解決しました。 これは、1000 を超える並列回路を備えた HBM などの 3D-IC の開発に特に役立ちます。
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Report
(4 results)
Research Products
(12 results)