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Development of tunnel field-effect transistor with steep switching based on dimensional control of density-of-state

Research Project

Project/Area Number 20K14797
Research Category

Grant-in-Aid for Early-Career Scientists

Allocation TypeMulti-year Fund
Review Section Basic Section 21060:Electron device and electronic equipment-related
Research InstitutionNational Institute of Advanced Industrial Science and Technology

Principal Investigator

Kato Kimihiko  国立研究開発法人産業技術総合研究所, エレクトロニクス・製造領域, 主任研究員 (30815486)

Project Period (FY) 2020-04-01 – 2023-03-31
Project Status Completed (Fiscal Year 2022)
Budget Amount *help
¥4,290,000 (Direct Cost: ¥3,300,000、Indirect Cost: ¥990,000)
Fiscal Year 2022: ¥1,300,000 (Direct Cost: ¥1,000,000、Indirect Cost: ¥300,000)
Fiscal Year 2021: ¥1,300,000 (Direct Cost: ¥1,000,000、Indirect Cost: ¥300,000)
Fiscal Year 2020: ¥1,690,000 (Direct Cost: ¥1,300,000、Indirect Cost: ¥390,000)
KeywordsトンネルFET / TFET / シリコン / 低消費電力 / 急峻スイッチング / オン電流 / 集積回路
Outline of Research at the Start

超低消費電力集積回路に向け、急峻スイッチング素子として有望なトンネルFET(TFET)の高性能化を行う。スイッチング急峻性の確保には、ステップ状の状態密度関数が得られる2次元電子状態を有するPN接合間のトンネル現象を利用することが望まれる。本研究では、これを応用容易なSiチャネルTFETで実現することを目的とする。Si FinFETを基にした新規TFET素子構造を提案し、作製プロセスの確立と急峻スイッチングTFET動作の実験実証を目指す。

Outline of Final Research Achievements

For future integrated circuits with low power consumption, development of a high-performance tunnel field-effect transistor (TFET), which is one of the most promising devices with steep on/off switching, has been carried out. A new device structure was proposed to utilize two-dimensional density-of-state (2D-DOS), and TCAD-based performance investigation, process development, and experimental demonstration have been performed.
The newly proposed TFET consists of a Si Fin channel with regions of high impurity concentrations, which is formed by the tilted ion implantation technique. TCAD device simulation revealed that the TFET has the potential to realize the on/off switching of more than 5 orders under the operation voltage of 0.3 V after the optimization. For experimental, high-performance electron beam lithography was developed by utilizing a new negative-tone resist. Finally, enhancement of on-state current was demonstrated by a TFET device with a channel width of less than 10 nm.

Academic Significance and Societal Importance of the Research Achievements

半導体集積回路の低消費電力化は、世の中で急速に発展するIoT/AI技術を支える重要技術である。半導体トランジスタはそれら集積回路の基盤素子であり、トランジスタの低消費電力は、次世代エレクトロニクスのエネルギー高効率化に幅広く貢献する。本研究は、既存半導体製造技術を積極的に活用し、Si CMOSラインを念頭に置いていることも重要な特徴である。Siは他の新材料系に比べてオン電流増大に難しさがあるものの、その課題克服に向けて真正面から取り組んだ研究である。本研究で開発したSiを基軸にしたTFETのオン電流増大技術は、将来の半導体集積回路に直結し得る、実用性のある技術と言える。

Report

(4 results)
  • 2022 Annual Research Report   Final Research Report ( PDF )
  • 2021 Research-status Report
  • 2020 Research-status Report
  • Research Products

    (11 results)

All 2023 2022 2021

All Journal Article (3 results) (of which Peer Reviewed: 3 results) Presentation (8 results) (of which Int'l Joint Research: 5 results,  Invited: 3 results)

  • [Journal Article] Single-electron transistor operation of a physically defined silicon quantum dot device fabricated by electron beam lithography employing a negative-tone resist2023

    • Author(s)
      Shimpei Nishiyama, Kimihiko Kato, Yongxun Liu, Raisei Mizokuchi, Jun Yoneda, Tetsuo Kodera, and Takahiro Mori
    • Journal Title

      The Institute of Electronics, Information and Communication Engineers (IEICE) Transactions

      Volume: -

    • Related Report
      2022 Annual Research Report
    • Peer Reviewed
  • [Journal Article] Si bilayer tunnel field-effect transistor structure realized using tilted ion-implantation technique2021

    • Author(s)
      Kato Kimihiko、Asai Hidehiro、Fukuda Koichi、Mori Takahiro、Morita Yukinori
    • Journal Title

      Solid-State Electronics

      Volume: 180 Pages: 107993-107993

    • DOI

      10.1016/j.sse.2021.107993

    • Related Report
      2021 Research-status Report 2020 Research-status Report
    • Peer Reviewed
  • [Journal Article] Electron beam lithography with negative tone resist for highly integrated silicon quantum bits2021

    • Author(s)
      Kato Kimihiko、Liu Yongxun、Murakami Shigenori、Morita Yukinori、Mori Takahiro
    • Journal Title

      Nanotechnology

      Volume: 32 Issue: 48 Pages: 485301-485301

    • DOI

      10.1088/1361-6528/ac201b

    • Related Report
      2021 Research-status Report
    • Peer Reviewed
  • [Presentation] Introduction of deep impurity levels of S and Zn and high temperature single-electron transport in Si tunnel FETs2022

    • Author(s)
      Yoshisuke Ban, Kimihiko Kato, Shota Iizuka, Shigenori Murakami, Koji Ishibashi, Satoshi Moriyama, Takahiro Mori, and Keiji Ono
    • Organizer
      2022 International Conference on Solid State Devices and Materials (SSDM 2022)
    • Related Report
      2022 Annual Research Report
    • Int'l Joint Research
  • [Presentation] Single-Electron Transistor Operation of a Physically Defined Silicon Quantum Dot Device Fabricated by Electron Beam Lithography Employing Negative-tone Resist2022

    • Author(s)
      Shimpei Nishiyama, Kimihiko Kato, Yongxun Liu, Raisei Mizokuchi, Jun Yoneda, Tetsuo Kodera, and Takahiro Mori
    • Organizer
      2022 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices
    • Related Report
      2022 Annual Research Report
    • Int'l Joint Research
  • [Presentation] Single electron transport and electron spin qubit operation in Si tunnel FETs with an isoelectronic trap impurity of beryllium2022

    • Author(s)
      Yoshisuke Ban, Kimihiko Kato, Shota Iizuka, Koji Ishibashi, Satoshi Moriyama, Takahiro Mori, and Keiji Ono
    • Organizer
      2022 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices
    • Related Report
      2022 Annual Research Report
    • Int'l Joint Research
  • [Presentation] 集積シリコン量子ビット作製に向けた電子線リソグラフィ技術の開発2022

    • Author(s)
      加藤 公彦
    • Organizer
      次世代リソグラフィ技術研究会(応用物理学会 次世代リソグラフィ技術分科会)
    • Related Report
      2021 Research-status Report
    • Invited
  • [Presentation] シリコン量子ビット作製と大規模集積化に向けた電子線リソグラフィ技術2022

    • Author(s)
      加藤 公彦
    • Organizer
      NPF合同セミナー
    • Related Report
      2021 Research-status Report
    • Invited
  • [Presentation] Development of electron beam lithography technique for fabrication of integrated silicon quantum bits2021

    • Author(s)
      加藤公彦、柳永勛、村上重則、森田行則、森貴洋
    • Organizer
      34th International Microprocesses and Nanotechnology Conference (MNC 2021)
    • Related Report
      2021 Research-status Report
    • Int'l Joint Research
  • [Presentation] Electron Beam Lithography for Future Highly-Integrated Si Quantum Bits2021

    • Author(s)
      加藤公彦
    • Organizer
      BEAMeeting E-Beam Workshop (jointed with Micro and Nano Engineering Conference)
    • Related Report
      2021 Research-status Report
    • Int'l Joint Research / Invited
  • [Presentation] 集積シリコン量子素子に向けたネガレジスト電子線リソグラフィ技術の構築2021

    • Author(s)
      加藤 公彦, 柳 永勛, 森田 行則, 森 貴洋
    • Organizer
      第82回応用物理学会秋季学術講演会
    • Related Report
      2021 Research-status Report

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Published: 2020-04-28   Modified: 2024-01-30  

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