Study on lithography-less solution process for nano-devices and its application to nonvolatile memories
| Project/Area Number |
21360144
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| Research Category |
Grant-in-Aid for Scientific Research (B)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
Electronic materials/Electric materials
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| Research Institution | Japan Advanced Institute of Science and Technology (2011)
Tokyo Institute of Technology (2009-2010) |
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Principal Investigator |
TOKUMITSU Eisuke 北陸先端科学技術大学院大学, グリーンデバイス研究センター, 教授 (10197882)
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| Project Period (FY) |
2009 – 2011
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| Project Status |
Completed (Fiscal Year 2011)
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| Budget Amount *help |
¥17,680,000 (Direct Cost: ¥13,600,000、Indirect Cost: ¥4,080,000)
Fiscal Year 2011: ¥4,810,000 (Direct Cost: ¥3,700,000、Indirect Cost: ¥1,110,000)
Fiscal Year 2010: ¥7,280,000 (Direct Cost: ¥5,600,000、Indirect Cost: ¥1,680,000)
Fiscal Year 2009: ¥5,590,000 (Direct Cost: ¥4,300,000、Indirect Cost: ¥1,290,000)
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| Keywords | 電子・電気材料 / 電子デバイス・機器 / ナノ材料 / 半導体超微細化 / マイクロ・ナノデバイス |
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| Research Abstract |
In this research project, a novel device fabrication process using liquid sources without conventional lithography techniques has been proposed. It was confirmed that the physical properties of thin films are closely related to thermal properties of source solutions and design concept for source solutions are defined. Next, ferroelectric-gate nonvolatile memory devices have been demonstrated using the proposed total solution process. In addition, the direct patterning of oxide films using solution process has been achieved.
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Report
(4 results)
Research Products
(66 results)
