Development of Ultra High Density Ferroelectric-gate Nonvolatile Logical Operation Device using Multi-electric Dipole
| Project/Area Number |
21360153
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| Research Category |
Grant-in-Aid for Scientific Research (B)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
Electronic materials/Electric materials
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| Research Institution | Osaka Prefecture University |
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Principal Investigator |
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| Project Period (FY) |
2009 – 2011
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| Project Status |
Completed (Fiscal Year 2011)
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| Budget Amount *help |
¥18,200,000 (Direct Cost: ¥14,000,000、Indirect Cost: ¥4,200,000)
Fiscal Year 2011: ¥3,120,000 (Direct Cost: ¥2,400,000、Indirect Cost: ¥720,000)
Fiscal Year 2010: ¥5,850,000 (Direct Cost: ¥4,500,000、Indirect Cost: ¥1,350,000)
Fiscal Year 2009: ¥9,230,000 (Direct Cost: ¥7,100,000、Indirect Cost: ¥2,130,000)
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| Keywords | 高密度メモリ / 不揮発性論理演算素子 / 強誘電体メモリ / 電気多重極子 |
|---|
| Research Abstract |
The effect of milti-electric dipole on the controlled polarization type ferroelectric gate field effect transistors was investigated to establish the principle to design the device. From the results of the analysis using the impedance spectroscopy and lumped constant circuit model, it was found that the transistors shows on-off operation at low voltage due to the effect of the spontaneous polarizations of the polar semiconductor. Moreover, low temperature process and sub-100nm process were developed. The effects of the ferroelectric domain on the carrier mobility were investigated using the transistors fabricated by the low temperature process. The results indicate that, while the carriers are scattered by the ferroelectric domain wall, high mobility is obtained by polarizing the ferroelectric layer in a single domain.
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Report
(4 results)
Research Products
(173 results)
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[Journal Article] Fabrication of robust PbLa(Zr,Ti)O_3 capacitor structures using insulating oxide encapsulation layers for FeRAM integration2011
Author(s)
T.Saito, T.Tsuji, K.Izumi, Y.Hirota, N.Okamoto, K.Kondo, T.Yoshimura, N.Fujimura, A.Kitajima, A.Oshima
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Journal Title
Electronics Letters
Volume: 47
Pages: 486-487
Related Report
Peer Reviewed
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[Presentation] Si:Ce薄膜の磁気・輸送特性2012
Author(s)
宮田祐輔, 高田浩史, 奥山祥孝, 藤村紀文
Organizer
2012年春季第59回応用物理学関係連合講演会
Place of Presentation
早稲田大学(東京都)
Year and Date
2012-03-17
Related Report
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