| Budget Amount *help |
¥17,420,000 (Direct Cost: ¥13,400,000、Indirect Cost: ¥4,020,000)
Fiscal Year 2012: ¥3,380,000 (Direct Cost: ¥2,600,000、Indirect Cost: ¥780,000)
Fiscal Year 2011: ¥3,120,000 (Direct Cost: ¥2,400,000、Indirect Cost: ¥720,000)
Fiscal Year 2010: ¥4,810,000 (Direct Cost: ¥3,700,000、Indirect Cost: ¥1,110,000)
Fiscal Year 2009: ¥6,110,000 (Direct Cost: ¥4,700,000、Indirect Cost: ¥1,410,000)
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| Research Abstract |
：In recent years, advances in LSI technology based on the continuous scaling of metal-oxide-semiconductor (MOS) field-effect transistors (FETs) has enabled improvements in the switching speed，density，functionality, and cost of microprocessors. However，such downsizing now becomes a cause of reducing the device performance due to increasing leakage current and short channel effects. In this project，we have investigated, making use of a newly developed quantum transport simulator, the effectiveness of using the InAs/Si hetero-junction nanowire (NW) as a solution to the above problem，and influence of strain caused byhetero-junction on tunneling characteristics through hetero interface. As a result, the simulator enabled us to find that the InAs p-i-n structure shows most favorable characteristics in both the on-current and the sub-threshold slope and the p-Si-i-Si-n-InAs structure is the runner-up.
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