Improvement in th e reli ability of super low power loss SiC static induction devices
Project/Area Number |
21560294
|
Research Category |
Grant-in-Aid for Scientific Research (C)
|
Allocation Type | Single-year Grants |
Section | 一般 |
Research Field |
Power engineering/Power conversion/Electric machinery
|
Research Institution | University of Yamanashi |
Principal Investigator |
YAN0 Koji 山梨大学, 大学院・医学工学総合研究部, 教授 (90252014)
|
Co-Investigator(Renkei-kenkyūsha) |
TANAKA Yasunori 産業技術総合研究所, 先進パワーエレクトロニクス研究センター, 主任研究員 (20357453)
YATSUO Tsutomu 産業技術総合研究所, 先進パワーエレクトロニクス研究センター, 非常勤研究員 (10399503)
|
Project Period (FY) |
2009 – 2011
|
Project Status |
Completed (Fiscal Year 2011)
|
Budget Amount *help |
¥4,680,000 (Direct Cost: ¥3,600,000、Indirect Cost: ¥1,080,000)
Fiscal Year 2011: ¥390,000 (Direct Cost: ¥300,000、Indirect Cost: ¥90,000)
Fiscal Year 2010: ¥650,000 (Direct Cost: ¥500,000、Indirect Cost: ¥150,000)
Fiscal Year 2009: ¥3,640,000 (Direct Cost: ¥2,800,000、Indirect Cost: ¥840,000)
|
Keywords | パワーエレクトロニクス / パワーデバイス / ワイドバンドギャップ / SiC |
Research Abstract |
For SiC-static induction transistors with the buried gate structure(SiC-BGSIT), high voltage blocking tests have been performed at Ta=125℃for 1000 hours. 1000V was applied between the drain and source electrode in the test. Through the test, any degradation in the electrical characteristics was not observed. This result means that the appropriate device process is done in the channel formation, and expects the high reliability of the SiC-BGSITs.
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Report
(4 results)
Research Products
(2 results)