Study on high-precision Analog-to-digital, Digital-to-analog converters using self-correction technique

• Project/Area Number: 21560369
• Research Category: Grant-in-Aid for Scientific Research (C)
• Allocation Type: Single-year Grants
• Section: 一般
• Research Field: Electron device/Electronic equipment
• Research Institution: Tokyo City University
• Principal Investigator: HOTTA Masao 東京都市大学, 知識工学部, 教授 (40409371)
• Project Period (FY): 2009 – 2011
• Project Status: Completed (Fiscal Year 2011)
• Budget Amount: ¥4,550,000 (Direct Cost: ¥3,500,000、Indirect Cost: ¥1,050,000); Fiscal Year 2011: ¥1,170,000 (Direct Cost: ¥900,000、Indirect Cost: ¥270,000); Fiscal Year 2010: ¥2,210,000 (Direct Cost: ¥1,700,000、Indirect Cost: ¥510,000); Fiscal Year 2009: ¥1,170,000 (Direct Cost: ¥900,000、Indirect Cost: ¥270,000)
• Keywords: 電子デバイス・集積回路 / AD変換器 / DA変換器 / アナログ・デジタル混載LSI / 自己校正技術 / 誤差補正技術 / チョッパ形増幅器

Research Abstract

In order to achieve high-precision Successive Approximation Register AD converter(SAR-ADC), we proposed three conversion methods with conversion redundancy : the non-binary search algorithm using one comparator and the binary search algorithm using three or two reference voltages and three or two comparators. Effectiveness of these methods was shown from the results of simulations and measurements. Furthermore, possibility of realization of high-precision DA converter(DAC) with 18-bit accuracy was addressed by using error correction method with a chopper-type amplifier and a synchronous detection for binary-weighted current DAC.

Research Products

• [Journal Article] 逐次比較近似ADCコンパレータ・オフセット影響の冗長アルゴリズムによるディジタル補正技術 (2011)
  • Author(s): 小川智彦, 松浦達治, 小林春夫, 高井伸和, 堀田正生, 他
  • Journal Title: 電子情報通信学会論文誌C Volume: vol.J94-C Pages: 68-78
  • NAID: 110008460344
  • Peer Reviewed
• [Journal Article] 逐次比較近似MDCコンパレータ・オフセット影響の冗長アルゴリズムによるディジタル補正技術 (2011)
  • Author(s): 小川智彦、松浦達治、小林春夫、高井伸和、 堀田正生, 他
  • Journal Title: 電子情報通信学会論文誌C Volume: vol.J94-C Pages: 68-78
  • Peer Reviewed
• [Journal Article] SAR ADC Architecture with Digital Error Correction (2010)
  • Author(s): Masao Hotta, Masayuki Kawakami, etal
  • Journal Title: IEEJ Trans. on Electrical and Electronic Engineering Volume: vol.5, no.6 Pages: 651-659
  • NAID: 10027456721
  • Peer Reviewed
• [Journal Article] SAR ADC Algorithm with Redundancy and Digital Error Correction (2010)
  • Author(s): T. Ogawa, M. Hotta, etal
  • Journal Title: IEICE Trans. Fundamentals Volume: vol.E93-A Pages: 415-423
  • NAID: 10026863103
  • Peer Reviewed
• [Journal Article] SAR ADC Architecture with Digital Error Correction (2010)
  • Author(s): M.Hotta, T.Kawakami, etal
  • Journal Title: IEEJ Trans.on Electrical and Electronic Engineering Volume: vol.5 Pages: 651-659
  • NAID: 10027456721
  • Peer Reviewed
• [Journal Article] 逐次比較近似ADCコンパレータ・オフセット影響の冗長アルゴリズムによるディジタル補正技術 (2010)
  • Author(s): 小川智彦、松浦達治、小林春夫、堀田正生, 他
  • Journal Title: 電子情報通信学会論文誌C Volume: vol.J94-C Pages: 1-11
  • NAID: 110008460344
  • Peer Reviewed
• [Journal Article] SAR ADC Algorithm with Redundancy and Digital Error Correction (2010)
  • Author(s): T.Ogawa, M.Hotta, etal
  • Journal Title: IEICE Trans. Fundamentals vol.E93-A Pages: 415-423
  • NAID: 10026863103
  • Peer Reviewed
• [Journal Article] ディジタル・アナログ混載システムにおける適応フィルタを用いたディジタル雑音低減の一方法 (2009)
  • Author(s): 川崎奈央, 堀田正生, 他
  • Journal Title: 電気学会 電子回路研究会資料 ECT-09-97 Pages: 11-16
  • NAID: 10026222752
• [Presentation] マルチ入力ΔΣ形AD変換器の回路構成に関する検討 (2012)
  • Author(s): 志水匠, 堀田正生, 傘昊
  • Organizer: 電気学会電子回路研究会
  • Place of Presentation: 山形大学工学部(米沢)
  • Year and Date: 2012-01-19
• [Presentation] Robust Switched-Capacitor ADC Based on Beta-expansion (2011)
  • Author(s): Tsubasa Maruyama, Hao San, Masao Hotta
  • Organizer: IEEJ International Analog VLSI Workshop
  • Place of Presentation: Bali, Indonesia
  • Year and Date: 2011-11-04
• [Presentation] Non-Binary Pipelined ADC with b-Encoding (2011)
  • Author(s): Hao San, Tomonari Kato, Tsubasa Maruyama, Masao Hotta
  • Organizer: IEEJ International Analog VLSI Workshop
  • Place of Presentation: Bali, Indonesia
  • Year and Date: 2011-11-04
• [Presentation] 冗長性をもった逐次比較形AD変換方式の比較 (2011)
  • Author(s): 田中美緒, 堀田正生
  • Organizer: 電子情報通信学会総合大会
  • Place of Presentation: 東京都市大学(東京)
  • Year and Date: 2011-03-15
• [Presentation] Non-Binary SAR ADC with Digital Error Correction for Low Power Applications (2010)
  • Author(s): T. Ogawa, T. Matsuura, H. Kobayashi, M. Hotta, etal
  • Organizer: IEEE Asia Pacific Conference on Circuits and Systems
  • Place of Presentation: Kuala Lumpur, Malaysia
  • Year and Date: 2010-12-07
• [Presentation] Design of SAR ADC with Digital Error Correction using Three Comparators (2009)
  • Author(s): M. Kawakami, M. Hotta, etal
  • Organizer: IEEJ International Analog VLSI Workshop
  • Place of Presentation: Chaing Mai, Thailand
  • Year and Date: 2009-11-18
• [Presentation] Design of SAR ADC with Digital Error Correction using Three Comparators (2009)
  • Author(s): M.Kawakami, M.Hotta, etal
  • Organizer: IEEJ International Analog VLSI Workshop
  • Place of Presentation: Imperial Mae Ping Hotel, Chains Mai, Thailand
  • Year and Date: 2009-11-18