Study on relaxed/strained semiconductor layer heterostructures fabricated by ion implantation induced relaxation technique of strained semiconductors
| Project/Area Number |
21560371
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| Research Category |
Grant-in-Aid for Scientific Research (C)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
Electron device/Electronic equipment
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| Research Institution | Kanagawa University |
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Principal Investigator |
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| Co-Investigator(Kenkyū-buntansha) |
SAMESHIMA Toshiyuki 東京農工大学, 共生科学技術研究院, 教授 (30271597)
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| Project Period (FY) |
2009 – 2011
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| Project Status |
Completed (Fiscal Year 2011)
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| Budget Amount *help |
¥4,680,000 (Direct Cost: ¥3,600,000、Indirect Cost: ¥1,080,000)
Fiscal Year 2011: ¥1,300,000 (Direct Cost: ¥1,000,000、Indirect Cost: ¥300,000)
Fiscal Year 2010: ¥1,170,000 (Direct Cost: ¥900,000、Indirect Cost: ¥270,000)
Fiscal Year 2009: ¥2,210,000 (Direct Cost: ¥1,700,000、Indirect Cost: ¥510,000)
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| Keywords | 電子デバイス / 集積回路 / 半導体物性 / マイクロ・ナノデバイス |
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| Research Abstract |
We have experimentally demonstrated an abrupt source heterostructure(SHOT) with relaxed/strained layers for a future high speed CMOS, using ion implantation technique. n-and p-SHOTs can be easily fabricated by the slip between the strained layer and the buried oxide on strained Si and SiGe layers, respectively, using the recoil energy of O+or H+ions.
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Report
(4 results)
Research Products
(35 results)
